linux-kernel - Re: [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20200109111320.GM32742@smile.fi.intel.com>
Date:   Thu, 9 Jan 2020 13:13:20 +0200
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Linus Walleij <linus.walleij@...aro.org>
Cc:     linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
        Mika Westerberg <mika.westerberg@...ux.intel.com>,
        Mathias Nyman <mathias.nyman@...ux.intel.com>,
        Hans de Goede <hdegoede@...hat.com>
Subject: Re: [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via
 callback

On Thu, Jan 09, 2020 at 08:53:28AM +0100, Linus Walleij wrote:
> When IRQ chip is instantiated via GPIO library flow, the few functions,
> in particular the ACPI event registration mechanism, on some of ACPI based
> platforms expect that the pin ranges are initialized to that point.
> 
> Add GPIO <-> pin mapping ranges via callback in the GPIO library flow.
> 

Pushed to my review and testing queue, thanks!

> Cc: Hans de Goede <hdegoede@...hat.com>
> Signed-off-by: Linus Walleij <linus.walleij@...aro.org>
> ---
> Please apply this to the Intel pinctrl tree when you're pleased
> with it!
> ---
>  drivers/pinctrl/intel/pinctrl-intel.c | 35 +++++++++++++++++----------
>  1 file changed, 22 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
> index 4860bc9a4e48..b479bcf1e246 100644
> --- a/drivers/pinctrl/intel/pinctrl-intel.c
> +++ b/drivers/pinctrl/intel/pinctrl-intel.c
> @@ -1160,8 +1160,8 @@ static irqreturn_t intel_gpio_irq(int irq, void *data)
>  	return ret;
>  }
>  
> -static int intel_gpio_add_pin_ranges(struct intel_pinctrl *pctrl,
> -				     const struct intel_community *community)
> +static int intel_gpio_add_community_ranges(struct intel_pinctrl *pctrl,
> +				const struct intel_community *community)
>  {
>  	int ret = 0, i;
>  
> @@ -1181,6 +1181,24 @@ static int intel_gpio_add_pin_ranges(struct intel_pinctrl *pctrl,
>  	return ret;
>  }
>  
> +static int intel_gpio_add_pin_ranges(struct gpio_chip *gc)
> +{
> +	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
> +	int ret, i;
> +
> +	for (i = 0; i < pctrl->ncommunities; i++) {
> +		struct intel_community *community = &pctrl->communities[i];
> +
> +		ret = intel_gpio_add_community_ranges(pctrl, community);
> +		if (ret) {
> +			dev_err(pctrl->dev, "failed to add GPIO pin range\n");
> +			return ret;
> +		}
> +	}
> +
> +	return 0;
> +}
> +
>  static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
>  {
>  	const struct intel_community *community;
> @@ -1205,7 +1223,7 @@ static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
>  
>  static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
>  {
> -	int ret, i;
> +	int ret;
>  
>  	pctrl->chip = intel_gpio_chip;
>  
> @@ -1214,6 +1232,7 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
>  	pctrl->chip.label = dev_name(pctrl->dev);
>  	pctrl->chip.parent = pctrl->dev;
>  	pctrl->chip.base = -1;
> +	pctrl->chip.add_pin_ranges = intel_gpio_add_pin_ranges;
>  	pctrl->irq = irq;
>  
>  	/* Setup IRQ chip */
> @@ -1231,16 +1250,6 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
>  		return ret;
>  	}
>  
> -	for (i = 0; i < pctrl->ncommunities; i++) {
> -		struct intel_community *community = &pctrl->communities[i];
> -
> -		ret = intel_gpio_add_pin_ranges(pctrl, community);
> -		if (ret) {
> -			dev_err(pctrl->dev, "failed to add GPIO pin range\n");
> -			return ret;
> -		}
> -	}
> -
>  	/*
>  	 * We need to request the interrupt here (instead of providing chip
>  	 * to the irq directly) because on some platforms several GPIO
> -- 
> 2.23.0
> 

-- 
With Best Regards,
Andy Shevchenko