[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <c716f793e22e4885a3dee3c91f93e517@AcuMS.aculab.com>
Date: Thu, 9 Jan 2020 14:13:48 +0000
From: David Laight <David.Laight@...LAB.COM>
To: 'Sean Christopherson' <sean.j.christopherson@...el.com>,
Paolo Bonzini <pbonzini@...hat.com>
CC: Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] KVM: x86/mmu: Fix a benign Bitwise vs. Logical OR mixup
From: Sean Christopherson
> Sent: 08 January 2020 00:19
>
> Use a Logical OR in __is_rsvd_bits_set() to combine the two reserved bit
> checks, which are obviously intended to be logical statements. Switching
> to a Logical OR is functionally a nop, but allows the compiler to better
> optimize the checks.
>
> Signed-off-by: Sean Christopherson <sean.j.christopherson@...el.com>
> ---
> arch/x86/kvm/mmu/mmu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
> index 7269130ea5e2..72e845709027 100644
> --- a/arch/x86/kvm/mmu/mmu.c
> +++ b/arch/x86/kvm/mmu/mmu.c
> @@ -3970,7 +3970,7 @@ __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level)
> {
> int bit7 = (pte >> 7) & 1, low6 = pte & 0x3f;
>
> - return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) |
> + return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) ||
> ((rsvd_check->bad_mt_xwr & (1ull << low6)) != 0);
Are you sure this isn't deliberate?
The best code almost certainly comes from also removing the '!= 0'.
You also don't want to convert the expression result to zero.
So:
return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) | (rsvd_check->bad_mt_xwr & (1ull << low6));
The code then doesn't have any branches to get mispredicted.
David
-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
Powered by blists - more mailing lists