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Message-ID: <CACMCwJ+FE8yD10VF07ci6tTqiBA8aBejKQT0EwyayQQOrLGUKQ@mail.gmail.com>
Date: Sun, 12 Jan 2020 15:03:44 +0200
From: Jari Ruusu <jari.ruusu@...il.com>
To: Borislav Petkov <bp@...en8.de>, Fenghua Yu <fenghua.yu@...el.com>,
Luis Chamberlain <mcgrof@...nel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>
Cc: linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: Fix built-in early-load Intel microcode alignment
On 1/12/20, Jari Ruusu <jari.ruusu@...il.com> wrote:
> Intel Software Developer's Manual, volume 3, chapter 9.11.6 says:
> "Note that the microcode update must be aligned on a 16-byte
> boundary and the size of the microcode update must be 1-KByte
> granular"
>
> When early-load Intel microcode is loaded from initramfs,
> userspace tool 'iucode_tool' has already 16-byte aligned those
> microcode bits in that initramfs image. Image that was created
> something like this:
>
> iucode_tool --write-earlyfw=FOO.cpio microcode-files...
>
> However, when early-load Intel microcode is loaded from built-in
> firmware BLOB using CONFIG_EXTRA_FIRMWARE= kernel config option,
> that 16-byte alignment is not guaranteed.
>
> Fix this by forcing all built-in firmware BLOBs to 16-byte
> alignment.
Backport of "Fix built-in early-load Intel microcode alignment"
for linux-4.19 and older stable kernels.
Signed-off-by: Jari Ruusu <jari.ruusu@...il.com>
--- a/firmware/Makefile
+++ b/firmware/Makefile
@@ -19,7 +19,7 @@
PROGBITS=$(if $(CONFIG_ARM),%,@)progbits; \
echo "/* Generated by firmware/Makefile */" > $@;\
echo " .section .rodata" >>$@;\
- echo " .p2align $${ASM_ALIGN}" >>$@;\
+ echo " .p2align 4" >>$@;\
echo "_fw_$${FWSTR}_bin:" >>$@;\
echo " .incbin \"$(2)\"" >>$@;\
echo "_fw_end:" >>$@;\
--
Jari Ruusu 4096R/8132F189 12D6 4C3A DCDA 0AA4 27BD ACDF F073 3C80 8132 F189
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