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Message-ID: <CANMq1KBxL55A8vDwNsqNpDmdNUxkpJ+JPByDaTEFwxnPQM8ESw@mail.gmail.com>
Date: Mon, 13 Jan 2020 14:20:29 +0800
From: Nicolas Boichat <drinkcat@...omium.org>
To: Jiaxin Yu <jiaxin.yu@...iatek.com>
Cc: Yong Liang <yong.liang@...iatek.com>, wim@...ux-watchdog.org,
linux@...ck-us.net, Philipp Zabel <p.zabel@...gutronix.de>,
Matthias Brugger <matthias.bgg@...il.com>,
linux-watchdog@...r.kernel.org,
lkml <linux-kernel@...r.kernel.org>,
linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
Devicetree List <devicetree@...r.kernel.org>,
chang-an.chen@...iatek.com, freddy.hsin@...iatek.com,
Yingjoe Chen <yingjoe.chen@...iatek.com>,
Stephen Boyd <sboyd@...nel.org>
Subject: Re: [PATCH v11 3/3] watchdog: mtk_wdt: mt2712: Add reset controller
On Fri, Jan 10, 2020 at 3:04 PM Jiaxin Yu <jiaxin.yu@...iatek.com> wrote:
>
> Add reset controller for 2712.
> Besides watchdog, MTK toprgu module alsa provide sub-system (eg, audio,
> camera, codec and connectivity) software reset functionality.
>
> Signed-off-by: yong.liang <yong.liang@...iatek.com>
> Signed-off-by: Jiaxin Yu <jiaxin.yu@...iatek.com>
> Reviewed-by: Yingjoe Chen <yingjoe.chen@...iatek.com>
> Reviewed-by: Philipp Zabel <p.zabel@...gutronix.de>
This is somewhat ok I guess, as Philipp review the same code before
you split it into 2 patches.
> Reviewed-by: Rob Herring <robh@...nel.org>
> Reviewed-by: Guenter Roeck <groeck7@...il.com>
Those 2 need to be dropped.
> ---
> drivers/watchdog/mtk_wdt.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
> index e88aacb0404d..d6a6393f609d 100644
> --- a/drivers/watchdog/mtk_wdt.c
> +++ b/drivers/watchdog/mtk_wdt.c
> @@ -9,6 +9,7 @@
> * Based on sunxi_wdt.c
> */
>
> +#include <dt-bindings/reset-controller/mt2712-resets.h>
> #include <dt-bindings/reset-controller/mt8183-resets.h>
> #include <linux/delay.h>
> #include <linux/err.h>
> @@ -67,6 +68,10 @@ struct mtk_wdt_data {
> int toprgu_sw_rst_num;
> };
>
> +static const struct mtk_wdt_data mt2712_data = {
> + .toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM,
> +};
> +
> static const struct mtk_wdt_data mt8183_data = {
> .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
> };
> @@ -314,6 +319,7 @@ static int mtk_wdt_resume(struct device *dev)
> #endif
>
> static const struct of_device_id mtk_wdt_dt_ids[] = {
> + { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data },
> { .compatible = "mediatek,mt6589-wdt" },
> { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
> { /* sentinel */ }
> --
> 2.18.0
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