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Message-ID: <20200113112201.GL42593@e119886-lin.cambridge.arm.com>
Date: Mon, 13 Jan 2020 11:22:02 +0000
From: Andrew Murray <andrew.murray@....com>
To: "Z.q. Hou" <zhiqiang.hou@....com>
Cc: "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
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Leo Li <leoyang.li@....com>,
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Mingkai Hu <mingkai.hu@....com>,
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Xiaowei Bao <xiaowei.bao@....com>
Subject: Re: [PATCHv9 06/12] PCI: mobiveil: Add callback function for link up
check
On Wed, Nov 20, 2019 at 03:45:57AM +0000, Z.q. Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@....com>
>
> The platforms, in which the Mobiveil GPEX is integrated,
> may have their specific mechanism to check link up status.
> This patch is to enable these platforms to implement theirs.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> ---
> V9:
> - New patch splited from the #1 of V8 patches to make it easy to review.
>
> drivers/pci/controller/mobiveil/pcie-mobiveil.c | 3 +++
> drivers/pci/controller/mobiveil/pcie-mobiveil.h | 5 +++++
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.c b/drivers/pci/controller/mobiveil/pcie-mobiveil.c
> index 2773f823c9ea..b9ed2d95641c 100644
> --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.c
> +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.c
> @@ -125,6 +125,9 @@ void mobiveil_csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off,
>
> bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie)
> {
> + if (pcie->ops->link_up)
> + return pcie->ops->link_up(pcie);
> +
> return (mobiveil_csr_readl(pcie, LTSSM_STATUS) &
> LTSSM_STATUS_L0_MASK) == LTSSM_STATUS_L0;
On the previous patch I suggested that we don't mix up the link_up logic
with the logic that decides which function to call. In this case the link_up
logic is trivial. So this is probably OK.
Reviewed-by: Andrew Murray <andrew.murray@....com>
> }
> diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> index 18d85806a7fc..95d2e7c809b8 100644
> --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> @@ -148,6 +148,10 @@ struct root_port {
> struct pci_host_bridge *bridge;
> };
>
> +struct mobiveil_pab_ops {
> + int (*link_up)(struct mobiveil_pcie *pcie);
> +};
> +
> struct mobiveil_pcie {
> struct platform_device *pdev;
> void __iomem *csr_axi_slave_base; /* root port config base */
> @@ -157,6 +161,7 @@ struct mobiveil_pcie {
> int ppio_wins;
> int ob_wins_configured; /* configured outbound windows */
> int ib_wins_configured; /* configured inbound windows */
> + const struct mobiveil_pab_ops *ops;
> struct root_port rp;
> };
>
> --
> 2.17.1
>
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