linux-kernel - Re: [PATCH v1 3/3] PCI: Consider alignment of hot-added bridges when distributing available resources

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Date:   Mon, 13 Jan 2020 18:07:08 +0200
From:   Mika Westerberg <mika.westerberg@...ux.intel.com>
To:     Nicholas Johnson <nicholas.johnson-opensource@...look.com.au>
Cc:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Logan Gunthorpe <logang@...tatee.com>
Subject: Re: [PATCH v1 3/3] PCI: Consider alignment of hot-added bridges when
 distributing available resources

On Mon, Jan 06, 2020 at 03:46:13PM +0000, Nicholas Johnson wrote:
> Change pci_bus_distribute_available_resources() to better handle bridges
> with different resource alignment requirements.
> 
> The arguments io, mmio and mmio_pref represent the start and end
> addresses of resource, in which we must fit the current bridge window.
> 
> The steps taken by pci_bus_distribute_available_resources():
> 
> 	- For io, mmio and mmio_pref, increase .start to align with the
> 	  alignment of the current bridge window (otherwise the current
> 	  bridge window may not fit within the available range).
> 
> 	- For io, mmio and mmio_pref, adjust the current bridge window
> 	  to the size after the above.
> 
> 	- Count the number of hotplug bridges and normal bridges on this
> 	  bus.
> 
> 	- If the total number of bridges is one, give that bridge all of
> 	  the resources and return.
> 
> 	- If there are no hotplug bridges, return.
> 
> 	- For io, mmio and mmio_pref, increase .start by the amount
> 	  required for each bridge resource on the bus for non hotplug
> 	  bridges, giving extra room to make up for alignment of those
> 	  resources.
> 
> 	- For io, mmio and mmio_pref, calculate the resource size per
> 	  hotplug bridge which is available after the previous steps.
> 
> 	- For io, mmio and mmio_pref, distribute the resources to each
> 	  hotplug bridge, with the sizes calculated above.
> 
> The motivation for fixing this is Thunderbolt with native PCI
> enumeration, enabling external graphics cards and other devices with
> bridge alignment higher than 1MB. This fixes the use case where the user
> hot-adds Thunderbolt devices containing PCI devices with BAR
> alignment >1M and having the resources fail to assign.
> 
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=199581
> Reported-by: Mika Westerberg <mika.westerberg@...ux.intel.com>

Still solves the issue I reported above so,

Tested-by: Mika Westerberg <mika.westerberg@...ux.intel.com>

Also looks good to me,

Reviewed-by: Mika Westerberg <mika.westerberg@...ux.intel.com>