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Message-ID: <129bf2bc-c0e9-02a3-7d40-0f7920803769@gmail.com>
Date:   Tue, 14 Jan 2020 13:56:11 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Vladimir Oltean <olteanv@...il.com>,
        Alexander Lobakin <alobakin@...nk.ru>
Cc:     "David S. Miller" <davem@...emloft.net>,
        Edward Cree <ecree@...arflare.com>,
        Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Hauke Mehrtens <hauke@...ke-m.de>,
        Sean Wang <sean.wang@...iatek.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Jiri Pirko <jiri@...lanox.com>,
        Eric Dumazet <edumazet@...gle.com>,
        Paolo Abeni <pabeni@...hat.com>,
        Jakub Kicinski <jakub.kicinski@...ronome.com>,
        Taehee Yoo <ap420073@...il.com>,
        Stephen Hemminger <stephen@...workplumber.org>,
        Stanislav Fomichev <sdf@...gle.com>,
        Daniel Borkmann <daniel@...earbox.net>,
        Song Liu <songliubraving@...com>,
        Matteo Croce <mcroce@...hat.com>,
        Jakub Sitnicki <jakub@...udflare.com>,
        Paul Blakey <paulb@...lanox.com>,
        Yoshiki Komachi <komachi.yoshiki@...il.com>,
        netdev <netdev@...r.kernel.org>,
        lkml <linux-kernel@...r.kernel.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-arm-kernel@...ts.infradead.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@...ts.infradead.org>
Subject: Re: [PATCH RFC net-next 05/19] net: dsa: tag_ar9331: add GRO
 callbacks

On 1/13/20 2:28 AM, Vladimir Oltean wrote:
> On Mon, 13 Jan 2020 at 11:46, Alexander Lobakin <alobakin@...nk.ru> wrote:
>>
>> Vladimir Oltean wrote 13.01.2020 12:42:
>>> Hi Alexander,
>>>
>>> On Mon, 13 Jan 2020 at 11:22, Alexander Lobakin <alobakin@...nk.ru>
>>> wrote:
>>>>
>>>> CPU ports can't be bridged anyway
>>>>
>>>> Regards,
>>>> ᚷ ᛖ ᚢ ᚦ ᚠ ᚱ
>>>
>>> The fact that CPU ports can't be bridged is already not ideal.
>>> One can have a DSA switch with cascaded switches on each port, so it
>>> acts like N DSA masters (not as DSA links, since the taggers are
>>> incompatible), with each switch forming its own tree. It is desirable
>>> that the ports of the DSA switch on top are bridged, so that
>>> forwarding between cascaded switches does not pass through the CPU.
>>
>> Oh, I see. But currently DSA infra forbids the adding DSA masters to
>> bridges IIRC. Can't name it good or bad decision, but was introduced
>> to prevent accidental packet flow breaking on DSA setups.
>>
> 
> I just wanted to point out that some people are going to be looking at
> ways by which the ETH_P_XDSA handler can be made to play nice with the
> master's rx_handler, and that it would be nice to at least not make
> the limitation worse than it is by converting everything to
> rx_handlers (which "currently" can't be stacked, from the comments in
> netdevice.h).

I am not sure this would change the situation much, today we cannot have
anything but switch tags travel on the DSA master network device,
whether we accomplish the RX tap through a special skb->protocol value
or via rx_handler, it probably does not functionally matter, but it
could change the performance.
-- 
Florian

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