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Message-ID: <1578986667-16041-8-git-send-email-skomatineni@nvidia.com>
Date: Mon, 13 Jan 2020 23:24:12 -0800
From: Sowjanya Komatineni <skomatineni@...dia.com>
To: <skomatineni@...dia.com>, <thierry.reding@...il.com>,
<jonathanh@...dia.com>, <broonie@...nel.org>,
<lgirdwood@...il.com>, <perex@...ex.cz>, <tiwai@...e.com>,
<digetx@...il.com>, <mperttunen@...dia.com>,
<gregkh@...uxfoundation.org>, <sboyd@...nel.org>,
<robh+dt@...nel.org>, <mark.rutland@....com>
CC: <pdeschrijver@...dia.com>, <pgaikwad@...dia.com>,
<spujar@...dia.com>, <josephl@...dia.com>,
<daniel.lezcano@...aro.org>, <mmaddireddy@...dia.com>,
<markz@...dia.com>, <devicetree@...r.kernel.org>,
<linux-clk@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH v8 07/22] dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
Tegra PMC has 3 clocks clk_out_1, clk_out_2, and clk_out_3.
This patch documents PMC clock bindings and adds a header defining
Tegra PMC clock ids.
Tested-by: Dmitry Osipenko <digetx@...il.com>
Reviewed-by: Dmitry Osipenko <digetx@...il.com>
Reviewed-by: Rob Herring <robh@...nel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
---
.../devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml | 12 ++++++++++++
include/dt-bindings/soc/tegra-pmc.h | 15 +++++++++++++++
2 files changed, 27 insertions(+)
create mode 100644 include/dt-bindings/soc/tegra-pmc.h
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml
index 3ff34b348141..5b5c42a00264 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml
@@ -40,6 +40,15 @@ properties:
Must contain an entry for each entry in clock-names.
See ../clocks/clocks-bindings.txt for details.
+ '#clock-cells':
+ const: 1
+ description:
+ Tegra PMC has clk_out_1, clk_out_2, and clk_out_3.
+ Consumer of PMC clock should specify the desired clock by having
+ the clock ID in its "clocks" phandle cell with pmc clock provider.
+ See include/dt-bindings/soc/tegra-pmc.h for the list of Tegra PMC
+ clock IDs.
+
'#interrupt-cells':
const: 2
description:
@@ -296,6 +305,7 @@ required:
- reg
- clock-names
- clocks
+ - '#clock-cells'
dependencies:
"nvidia,suspend-mode": ["nvidia,core-pwr-off-time", "nvidia,cpu-pwr-off-time"]
@@ -307,12 +317,14 @@ examples:
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
+ #include <dt-bindings/soc/tegra-pmc.h>
tegra_pmc: pmc@...0e400 {
compatible = "nvidia,tegra210-pmc";
reg = <0x0 0x7000e400 0x0 0x400>;
clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
clock-names = "pclk", "clk32k_in";
+ #clock-cells = <1>;
nvidia,invert-interrupt;
nvidia,suspend-mode = <0>;
diff --git a/include/dt-bindings/soc/tegra-pmc.h b/include/dt-bindings/soc/tegra-pmc.h
new file mode 100644
index 000000000000..f7c866404456
--- /dev/null
+++ b/include/dt-bindings/soc/tegra-pmc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_SOC_TEGRA_PMC_H
+#define _DT_BINDINGS_SOC_TEGRA_PMC_H
+
+#define TEGRA_PMC_CLK_OUT_1 0
+#define TEGRA_PMC_CLK_OUT_2 1
+#define TEGRA_PMC_CLK_OUT_3 2
+
+#define TEGRA_PMC_CLK_MAX 3
+
+#endif /* _DT_BINDINGS_SOC_TEGRA_PMC_H */
--
2.7.4
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