Message-ID: <CA+V-a8sP=zTU1UAbXBWCpAn0uduNnUg+JEK0-y8G-4dV4AVVGQ@mail.gmail.com>
Date:   Tue, 14 Jan 2020 08:11:12 +0000
From:   "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To:     Rob Herring <robh@...nel.org>
Cc:     Mark Rutland <mark.rutland@....com>,
        Heiko Stuebner <heiko@...ech.de>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        linux-pci <linux-pci@...r.kernel.org>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        Frank Rowand <frowand.list@...il.com>,
        Marek Vasut <marek.vasut+renesas@...il.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Will Deacon <will@...nel.org>,
        Magnus Damm <magnus.damm@...il.com>,
        Kishon Vijay Abraham I <kishon@...com>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        Catalin Marinas <catalin.marinas@....com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Chris Paterson <Chris.Paterson2@...esas.com>,
        Arnd Bergmann <arnd@...db.de>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        Simon Horman <horms@...ge.net.au>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        LAK <linux-arm-kernel@...ts.infradead.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
        LKML <linux-kernel@...r.kernel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        Tom Joseph <tjoseph@...ence.com>,
        Jingoo Han <jingoohan1@...il.com>,
        Andrew Murray <andrew.murray@....com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>
Subject: Re: [v3 4/6] dt-bindings: PCI: rcar: Add bindings for R-Car PCIe
 endpoint controller

Hi Rob,

thank you for the review.

On Mon, Jan 13, 2020 at 9:23 PM Rob Herring <robh@...nel.org> wrote:
>
> On Wed, Jan 08, 2020 at 04:22:09PM +0000, Lad Prabhakar wrote:
> > This patch adds the bindings for the R-Car PCIe endpoint driver.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > ---
> >  .../devicetree/bindings/pci/rcar-pci-ep.yaml  | 76 +++++++++++++++++++
> >  1 file changed, 76 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
>
> Fails 'make dt_binding_check':
>
> Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml: $id:
> path/filename 'pci/rcar-pcie-ep.yaml' doesn't match actual filename
>
my bad fill that and post a v4.

Cheers,
--Prabhakar Lad
> >
> > diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
> > new file mode 100644
> > index 000000000000..99c2a1174463
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
> > @@ -0,0 +1,76 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +# Copyright (C) 2020 Renesas Electronics Europe GmbH - https://www.renesas.com/eu/en/
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pci/rcar-pcie-ep.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Renesas R-Car PCIe Endpoint
> > +
> > +maintainers:
> > +  - Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - const: renesas,r8a774c0-pcie-ep
> > +      - const: renesas,rcar-gen3-pcie-ep
> > +
> > +  reg:
> > +    maxItems: 5
> > +
> > +  reg-names:
> > +    items:
> > +      - const: apb-base
> > +      - const: memory0
> > +      - const: memory1
> > +      - const: memory2
> > +      - const: memory3
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +  resets:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    maxItems: 1
> > +
> > +  clock-names:
> > +    items:
> > +      - const: pcie
> > +
> > +  max-functions:
> > +    minimum: 1
> > +    maximum: 6
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - reg-names
> > +  - resets
> > +  - power-domains
> > +  - clocks
> > +  - clock-names
> > +  - max-functions
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
> > +    #include <dt-bindings/power/r8a774c0-sysc.h>
> > +
> > +     pcie0_ep: pcie-ep@...00000 {
> > +            compatible = "renesas,r8a774c0-pcie-ep",
> > +                         "renesas,rcar-gen3-pcie-ep";
> > +            reg = <0 0xfe000000 0 0x80000>,
> > +                  <0x0 0xfe100000 0 0x100000>,
> > +                  <0x0 0xfe200000 0 0x200000>,
> > +                  <0x0 0x30000000 0 0x8000000>,
> > +                  <0x0 0x38000000 0 0x8000000>;
> > +            reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
> > +            resets = <&cpg 319>;
> > +            power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
> > +            clocks = <&cpg CPG_MOD 319>;
> > +            clock-names = "pcie";
> > +            max-functions = /bits/ 8 <1>;
> > +    };
> > --
> > 2.20.1
> >
>
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