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Date: Tue, 14 Jan 2020 11:08:57 +0100 From: Philipp Zabel <p.zabel@...gutronix.de> To: Rob Herring <robh@...nel.org>, devicetree@...r.kernel.org Cc: linux-kernel@...r.kernel.org, Dilip Kota <eswara.kota@...ux.intel.com> Subject: Re: [PATCH] dt-bindings: reset: intel,rcu-gw: Fix intel,global-reset schema Hi Rob, On Mon, 2020-01-13 at 15:45 -0600, Rob Herring wrote: > The intel,rcu-gw binding example has an error: > > Documentation/devicetree/bindings/reset/intel,rcu-gw.example.dt.yaml: > reset-controller@...00000: intel,global-reset: [[16, 30]] is too short > > The error isn't really correct as the problem is in how the data is > encoded and the schema is not fixed up by the tooling correctly. > However, array properties should describe the elements in the array, so > lets do that which fixes the error in the process. > > Fixes: b7ab0cb00d08 ("dt-bindings: reset: Add YAML schemas for the Intel Reset controller") > Cc: Philipp Zabel <p.zabel@...gutronix.de> > Cc: Dilip Kota <eswara.kota@...ux.intel.com> > Signed-off-by: Rob Herring <robh@...nel.org> > --- > Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml > index 246dea8a2ec9..8ac437282659 100644 > --- a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml > +++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml > @@ -23,7 +23,11 @@ properties: > description: Global reset register offset and bit offset. > allOf: > - $ref: /schemas/types.yaml#/definitions/uint32-array > - - maxItems: 2 > + items: > + - description: Register offset > + - description: Register bit offset > + minimum: 0 > + maximum: 31 > > "#reset-cells": > minimum: 2 Thank you, applied to reset/next. regards Philipp
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