linux-kernel - [PATCH 5.4 23/78] drm/i915: Add Wa_1408615072 and Wa

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Message-Id: <20200114094356.857631672@linuxfoundation.org>
Date:   Tue, 14 Jan 2020 11:00:57 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, stable@...nel.vger.org,
        Lucas De Marchi <lucas.demarchi@...el.com>,
        Matt Atwood <matthew.s.atwood@...el.com>,
        Radhakrishna Sripada <radhakrishna.sripada@...el.com>,
        Matt Roper <matthew.d.roper@...el.com>,
        Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>
Subject: [PATCH 5.4 23/78] drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehl

From: Matt Roper <matthew.d.roper@...el.com>

commit a7f3ad37f80d0d5eec9dad156964c0dac800a80e upstream.

Workaround database indicates we should disable clock gating of both the
vsunit and hsunit.

Bspec: 33450
Bspec: 33451
Cc: stable@...nel.vger.org
Cc: Lucas De Marchi <lucas.demarchi@...el.com>
Cc: Matt Atwood <matthew.s.atwood@...el.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@...el.com>
Signed-off-by: Matt Roper <matthew.d.roper@...el.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191224012026.3157766-3-matthew.d.roper@intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@...el.com>
(cherry picked from commit b9cf9dac3dac4c1d2a47d34f30ec53c0423cecf8)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>

---
 drivers/gpu/drm/i915/i915_reg.h |    4 +++-
 drivers/gpu/drm/i915/intel_pm.c |    8 ++++++++
 2 files changed, 11 insertions(+), 1 deletion(-)

--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4049,7 +4049,9 @@ enum {
 #define  GWUNIT_CLKGATE_DIS		(1 << 16)
 
 #define UNSLICE_UNIT_LEVEL_CLKGATE	_MMIO(0x9434)
-#define  VFUNIT_CLKGATE_DIS		(1 << 20)
+#define   VFUNIT_CLKGATE_DIS		REG_BIT(20)
+#define   HSUNIT_CLKGATE_DIS		REG_BIT(8)
+#define   VSUNIT_CLKGATE_DIS		REG_BIT(3)
 
 #define INF_UNIT_LEVEL_CLKGATE		_MMIO(0x9560)
 #define   CGPSF_CLKGATE_DIS		(1 << 3)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -9194,6 +9194,14 @@ static void icl_init_clock_gating(struct
 	/* WaEnable32PlaneMode:icl */
 	I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
 		   _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
+
+	/*
+	 * Wa_1408615072:icl,ehl  (vsunit)
+	 * Wa_1407596294:icl,ehl  (hsunit)
+	 */
+	intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE,
+			 0, VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
+
 }
 
 static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)