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Message-ID: <0769b7cb-4e01-eb83-8ad4-b29b4fafafd4@arm.com>
Date: Wed, 15 Jan 2020 18:46:07 +0000
From: James Morse <james.morse@....com>
To: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
Borislav Petkov <bp@...en8.de>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Tony Luck <tony.luck@...el.com>,
Robert Richter <rrichter@...vell.com>,
linux-edac@...r.kernel.org, tsoni@...eaurora.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
Evan Green <evgreen@...omium.org>,
Stephen Boyd <swboyd@...omium.org>, psodagud@...eaurora.org,
linux-arm-kernel@...ts.infradead.org, baicar@...amperecomputing.com
Subject: Re: [PATCH 0/2] Add EDAC support for Kryo CPU core caches
Hi Sai,
(CC: +Tyler)
On 05/12/2019 09:52, Sai Prakash Ranjan wrote:
> This series implements EDAC support for error reporting on
> Kryo{3,4}XX CPU caches L1,L2, L3-SCU. All the cores(big.LITTLE)
> in Kryo{3,4}XX CPUs implement RAS extensions and use interrupt
> based ECC mechanism to report errors.
>
> This series has been tested on SC7180, SDM845, SM8150 SoCs with
> Kryo{3,4}XX CPU cores based on ARM Cortex-A55, Cortex-A75 and
> Cortex-A76.
>
> This implementation is platform specific in contrast to the
> patch posted last time for generic error reporting on arm cortex
> implementations with RAS extensions by Kyle Yan.
> - https://patchwork.kernel.org/patch/10161955/
I think that series was dropped because it was too soc-specific and overlaps with the v8.2
kernel first support. That series was superseded by:
lore.kernel.org/r/1562086280-5351-1-git-send-email-baicar@...amperecomputing.com
Can you work with Tyler on a combined series? The combined support may need to look quite
different. (DT and big/little being the obvious differences).
I'm afraid this is the tip of the kernel-first-RAS iceberg.
Thanks,
James
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