[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAHk-=whOC9dakUZ_BzHq2d5oKXXGnrKf+M-4gZ8U+=F_OX4+Ew@mail.gmail.com>
Date: Wed, 15 Jan 2020 11:41:46 -0800
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Luis Chamberlain <mcgrof@...nel.org>
Cc: Jari Ruusu <jari.ruusu@...il.com>, Borislav Petkov <bp@...en8.de>,
Fenghua Yu <fenghua.yu@...el.com>, johannes.berg@...el.com,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
stable <stable@...r.kernel.org>,
Hans de Goede <hdegoede@...hat.com>,
Andy Lutomirski <luto@...nel.org>
Subject: Re: Fix built-in early-load Intel microcode alignment
On Wed, Jan 15, 2020 at 10:58 AM Luis Chamberlain <mcgrof@...nel.org> wrote:
>
> But *how? Why is there a 50/50 chance of it being aligned to
> 16 bytes if 8 bytes are currently specified?
What?
It's trivial.
Address 256 is 4-byte aligned. But it's also 8-byte aligned. And
16-byte aligned. And..
So if you ask for 8-byte alignment, and you already had that address
(or were just below it), you'll get 8-byte alignment. But it will
_also_ be 16-byte aligned just by happenstance.
And yes, exactly half of the addresses that are 8-byte aligned are
also 16-byte aligned, so you have a 50/50 chance of getting the bigger
alignment simply by random chance.
In fact, often you probably have a _better_ than 50/50 chance of
getting the bigger alignment, since many other things are aligned too,
and the starting address likely isn't very random. So it might have
started out with a bigger alignment even before you asked for just
8-byte aligned data from the linker.
(Of course, the reverse may be true too - there may be cases you were
coimpletely mis-aligned, and asking for 8-byte alignment will never
give you any more aligned memory, but I suspect aligned data is a lot
more common than unaligned data is)
Linus
Powered by blists - more mailing lists