[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1579123790-6894-5-git-send-email-eajames@linux.ibm.com>
Date: Wed, 15 Jan 2020 15:29:42 -0600
From: Eddie James <eajames@...ux.ibm.com>
To: linux-aspeed@...ts.ozlabs.org
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
mark.rutland@....com, jason@...edaemon.net, maz@...nel.org,
robh+dt@...nel.org, tglx@...utronix.de, joel@....id.au,
andrew@...id.au, eajames@...ux.ibm.com
Subject: [PATCH v6 04/12] ARM: dts: aspeed: ast2600: Add SCU interrupt controllers
Add nodes for the interrupt controllers provided by the SCU.
Signed-off-by: Eddie James <eajames@...ux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@...id.au>
---
arch/arm/boot/dts/aspeed-g6.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 796976d..6557212 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -268,6 +268,20 @@
compatible = "aspeed,ast2600-smpmem";
reg = <0x180 0x40>;
};
+
+ scu_ic0: interrupt-controller@0 {
+ #interrupt-cells = <1>;
+ compatible = "aspeed,ast2600-scu-ic0";
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ };
+
+ scu_ic1: interrupt-controller@1 {
+ #interrupt-cells = <1>;
+ compatible = "aspeed,ast2600-scu-ic1";
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ };
};
rng: hwrng@...e2524 {
--
1.8.3.1
Powered by blists - more mailing lists