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Message-ID: <20200115084410.GG325@dell>
Date: Wed, 15 Jan 2020 08:44:10 +0000
From: Lee Jones <lee.jones@...aro.org>
To: Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Darren Hart <dvhart@...radead.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
"H . Peter Anvin" <hpa@...or.com>, x86@...nel.org,
Zha Qipeng <qipeng.zha@...el.com>,
"David E . Box" <david.e.box@...ux.intel.com>,
Guenter Roeck <linux@...ck-us.net>,
Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Wim Van Sebroeck <wim@...ux-watchdog.org>,
platform-driver-x86@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 26/36] mfd: intel_soc_pmic: Add SCU IPC member to
struct intel_soc_pmic
On Mon, 13 Jan 2020, Mika Westerberg wrote:
> Both PMIC drivers (intel_soc_pmic_mrfld and intel_soc_pmic_bxtwc) will
> be using this field going forward to access the SCU IPC instance.
>
> While there add kernel-doc for the intel_soc_pmic structure.
>
> Signed-off-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> ---
> include/linux/mfd/intel_soc_pmic.h | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h
> index bfecd6bd4990..bda22d750be6 100644
> --- a/include/linux/mfd/intel_soc_pmic.h
> +++ b/include/linux/mfd/intel_soc_pmic.h
> @@ -13,6 +13,20 @@
>
> #include <linux/regmap.h>
>
> +/**
> + * struct intel_soc_pmic - Intel SoC PMIC data
> + * @irq: Interrupt number
Whose IRQ is this? I guess the parent's/PMIC's?
> + * @regmap: Pointer to the regmap structure
Whose Regmap is this? I guess the parent's/PMIC's?
> + * @irq_chip_data: IRQ chip data for the PMIC itself
> + * @irq_chip_data_pwrbtn: Chained IRQ chip data for the power button
> + * @irq_chip_data_tmu: Chained IRQ chip data for the TMU
> + * @irq_chip_data_bcu: Chained IRQ chip data for the BCU
> + * @irq_chip_data_adc: Chained IRQ chip data for the ADC
> + * @irq_chip_data_chgr: Chained IRQ chip data for the CHGR
> + * @irq_chip_data_crit: Chained IRQ chip data for the CRIT
Documentation is an ideal place to expand out these abbreviations.
> + * @dev: Pointer to the PMIC device
> + * @scu: SCU IPC pointer used for IPC operations
By this description I would have expected to find a struct of ops
(operations [call-backs]), but instead I found this:
struct intel_scu_ipc_dev {
struct device *dev;
void __iomem *ipc_base;
void __iomem *i2c_base;
struct completion cmd_complete;
u8 irq_mode;
};
Probably better to describe it as a "pointer to SCU (whatever that
means) IPC (slightly more common, but still better to expand I think)
device data structure".
> + */
> struct intel_soc_pmic {
> int irq;
> struct regmap *regmap;
> @@ -24,6 +38,7 @@ struct intel_soc_pmic {
> struct regmap_irq_chip_data *irq_chip_data_chgr;
> struct regmap_irq_chip_data *irq_chip_data_crit;
> struct device *dev;
> + struct intel_scu_ipc_dev *scu;
> };
>
> int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address,
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
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