linux-kernel - [PATCH v12 1/4] dt-bindings: mediatek: mt8183: Add #reset-cells

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Date:   Wed, 15 Jan 2020 16:58:25 +0800
From:   Yong Liang <yong.liang@...iatek.com>
To:     <yong.liang@...iatek.com>, <wim@...ux-watchdog.org>,
        <linux@...ck-us.net>, <p.zabel@...gutronix.de>,
        <matthias.bgg@...il.com>, <linux-watchdog@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <chang-an.chen@...iatek.com>, <freddy.hsin@...iatek.com>,
        <jiaxin.yu@...iatek.com>
CC:     <yingjoe.chen@...iatek.com>, <sboyd@...nel.org>
Subject: [PATCH v12 1/4] dt-bindings: mediatek: mt8183: Add #reset-cells

From: "yong.liang" <yong.liang@...iatek.com>

Add #reset-cells property and update example

Signed-off-by: yong.liang <yong.liang@...iatek.com>
Signed-off-by: Jiaxin Yu <jiaxin.yu@...iatek.com>
Reviewed-by: Yingjoe Chen <yingjoe.chen@...iatek.com>
Reviewed-by: Philipp Zabel <p.zabel@...gutronix.de>
Reviewed-by: Rob Herring <robh@...nel.org>
Reviewed-by: Guenter Roeck <groeck7@...il.com>
---
 .../devicetree/bindings/watchdog/mtk-wdt.txt    | 10 +++++++---
 .../reset-controller/mt8183-resets.h            | 17 +++++++++++++++++
 2 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
index fd380eb28df5..ecb9ff784832 100644
--- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
@@ -9,17 +9,21 @@ Required properties:
 	"mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622
 	"mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623
 	"mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629
+	"mediatek,mt8183-wdt", "mediatek,mt6589-wdt": for MT8183
 	"mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
 
 - reg : Specifies base physical address and size of the registers.
 
 Optional properties:
 - timeout-sec: contains the watchdog timeout in seconds.
+- #reset-cells: Should be 1.
 
 Example:
 
-wdt: watchdog@...00000 {
-	compatible = "mediatek,mt6589-wdt";
-	reg = <0x10000000 0x18>;
+watchdog: watchdog@...07000 {
+	compatible = "mediatek,mt8183-wdt",
+		     "mediatek,mt6589-wdt";
+	reg = <0 0x10007000 0 0x100>;
 	timeout-sec = <10>;
+	#reset-cells = <1>;
 };
diff --git a/include/dt-bindings/reset-controller/mt8183-resets.h b/include/dt-bindings/reset-controller/mt8183-resets.h
index 8804e34ebdd4..a1bbd41e0d12 100644
--- a/include/dt-bindings/reset-controller/mt8183-resets.h
+++ b/include/dt-bindings/reset-controller/mt8183-resets.h
@@ -78,4 +78,21 @@
 #define MT8183_INFRACFG_AO_I2C7_SW_RST				126
 #define MT8183_INFRACFG_AO_I2C8_SW_RST				127
 
+#define MT8183_INFRACFG_SW_RST_NUM				128
+
+#define MT8183_TOPRGU_MM_SW_RST					1
+#define MT8183_TOPRGU_MFG_SW_RST				2
+#define MT8183_TOPRGU_VENC_SW_RST				3
+#define MT8183_TOPRGU_VDEC_SW_RST				4
+#define MT8183_TOPRGU_IMG_SW_RST				5
+#define MT8183_TOPRGU_MD_SW_RST					7
+#define MT8183_TOPRGU_CONN_SW_RST				9
+#define MT8183_TOPRGU_CONN_MCU_SW_RST				12
+#define MT8183_TOPRGU_IPU0_SW_RST				14
+#define MT8183_TOPRGU_IPU1_SW_RST				15
+#define MT8183_TOPRGU_AUDIO_SW_RST				17
+#define MT8183_TOPRGU_CAMSYS_SW_RST				18
+
+#define MT8183_TOPRGU_SW_RST_NUM				19
+
 #endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8183 */
-- 
2.18.0