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Message-Id: <1579052348-32167-1-git-send-email-Anson.Huang@nxp.com>
Date: Wed, 15 Jan 2020 09:39:06 +0800
From: Anson Huang <Anson.Huang@....com>
To: aisheng.dong@....com, festevam@...il.com, shawnguo@...nel.org,
stefan@...er.ch, kernel@...gutronix.de, linus.walleij@...aro.org,
robh+dt@...nel.org, mark.rutland@....com, s.hauer@...gutronix.de,
catalin.marinas@....com, will@...nel.org, abel.vesa@....com,
bjorn.andersson@...aro.org, olof@...om.net, maxime@...no.tech,
leonard.crestez@....com, dinguyen@...nel.org,
marcin.juszkiewicz@...aro.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Cc: Linux-imx@....com
Subject: [PATCH V9 1/3] dt-bindings: imx: Add pinctrl binding doc for i.MX8MP
Add binding doc for i.MX8MP pinctrl driver.
Signed-off-by: Anson Huang <Anson.Huang@....com>
Reviewed-by: Abel Vesa <abel.vesa@....com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
Changes since V8:
- the lisence should be GPL-2.0
---
.../bindings/pinctrl/fsl,imx8mp-pinctrl.yaml | 69 ++++++++++++++++++++++
1 file changed, 69 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml
new file mode 100644
index 0000000..2e31e12
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mp-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale IMX8MP IOMUX Controller
+
+maintainers:
+ - Anson Huang <Anson.Huang@....com>
+
+description:
+ Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
+ for common binding part and usage.
+
+properties:
+ compatible:
+ const: fsl,imx8mp-iomuxc
+
+ reg:
+ maxItems: 1
+
+# Client device subnode's properties
+patternProperties:
+ 'grp$':
+ type: object
+ description:
+ Pinctrl node's client devices use subnodes for desired pin configuration.
+ Client device subnodes use below standard properties.
+
+ properties:
+ fsl,pins:
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ each entry consists of 6 integers and represents the mux and config
+ setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
+ mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
+ be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last
+ integer CONFIG is the pad setting value like pull-up on this pin. Please
+ refer to i.MX8M Plus Reference Manual for detailed CONFIG settings.
+
+ required:
+ - fsl,pins
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ # Pinmux controller node
+ - |
+ iomuxc: pinctrl@...30000 {
+ compatible = "fsl,imx8mp-iomuxc";
+ reg = <0x30330000 0x10000>;
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ 0x228 0x488 0x5F0 0x0 0x6 0x49
+ 0x228 0x488 0x000 0x0 0x0 0x49
+ >;
+ };
+ };
+
+...
--
2.7.4
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