linux-kernel - [PATCH 04/19] dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings

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Message-Id: <20200115141333.1222676-5-bryan.odonoghue@linaro.org>
Date:   Wed, 15 Jan 2020 14:13:18 +0000
From:   Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To:     linux-arm-msm@...r.kernel.org, linux-usb@...r.kernel.org,
        gregkh@...uxfoundation.org, jackp@...eaurora.org, balbi@...nel.org,
        bjorn.andersson@...aro.org
Cc:     linux-kernel@...r.kernel.org,
        Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@...aro.org>,
        Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        devicetree@...r.kernel.org,
        Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Subject: [PATCH 04/19] dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings

From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@...aro.org>

Binding description for Qualcomm's Synopsys 1.0.0 SuperSpeed phy
controller embedded in QCS404.

Based on Sriharsha Allenki's <sallenki@...eaurora.org> original
definitions.

[bod: converted to yaml format]

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@...aro.org>
Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@...il.com>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@...il.com>
Cc: devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
---
 .../devicetree/bindings/qcom,usb-ss.yaml      | 74 +++++++++++++++++++
 1 file changed, 74 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/qcom,usb-ss.yaml

diff --git a/Documentation/devicetree/bindings/qcom,usb-ss.yaml b/Documentation/devicetree/bindings/qcom,usb-ss.yaml
new file mode 100644
index 000000000000..fb0e399d64a0
--- /dev/null
+++ b/Documentation/devicetree/bindings/qcom,usb-ss.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/phy/qcom,usb-ss.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY
+
+maintainers:
+  - Bryan O'Donoghue <bryan.odonoghue@...aro.org>
+
+description: |
+  Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY.
+
+properties:
+
+- compatible:
+    enum:
+      - qcom,usb-ssphy
+
+  reg:
+    maxItems: 1
+    description: USB PHY base address and length of the register map.
+
+  "#phy-cells":
+    const: 0
+    description: Should be 0. See phy/phy-bindings.txt for details.
+
+  clocks:
+    items:
+      - description: Block reference clock
+      - description: PHY AHB clock
+      - description: SuperSpeed pipe clock
+
+  clock-names:
+    items:
+      - const: ref
+      - const: phy
+      - const: sleep
+
+  vdd-supply:
+    maxItems: 1
+    description: phandle to the regulator VDD supply node.
+
+  vdda1p8-supply:
+    maxItems: 1
+    description: phandle to the regulator 1.8V supply node.
+
+  resets:
+    items:
+      - description: COM reset
+      - description: PHY reset line
+
+  reset-names:
+    items:
+      - description: com
+      - description: phy
+
+Example:
+
+usb3_phy: usb3-phy@...00 {
+	compatible = "qcom,usb-ssphy";
+	reg = <0x78000 0x400>;
+	#phy-cells = <0>;
+	clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
+		 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
+		 <&gcc GCC_USB3_PHY_PIPE_CLK>;
+	clock-names = "ref", "phy", "pipe";
+	resets = <&gcc GCC_USB3_PHY_BCR>,
+		 <&gcc GCC_USB3PHY_PHY_BCR>;
+	reset-names = "com", "phy";
+	vdd-supply = <&vreg_l3_1p05>;
+	vdda1p8-supply = <&vreg_l5_1p8>;
+};
-- 
2.24.0