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Message-ID: <CAD=FV=WP1T7gGC=m5FOwuLvZdwrg5f7K6tDuYFT=0BgCQMZf7A@mail.gmail.com>
Date: Thu, 16 Jan 2020 10:27:08 -0800
From: Doug Anderson <dianders@...omium.org>
To: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Cc: Will Deacon <will@...nel.org>, Jeffrey Hugo <jhugo@...eaurora.org>,
Catalin Marinas <catalin.marinas@....com>,
Marc Zyngier <maz@...nel.org>,
Andre Przywara <andre.przywara@....com>,
Mark Rutland <mark.rutland@....com>,
LKML <linux-kernel@...r.kernel.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Stephen Boyd <swboyd@...omium.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Matthias Kaehlcke <mka@...omium.org>,
James Morse <james.morse@....com>
Subject: Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
Hi,
On Thu, Jan 16, 2020 at 8:11 AM Sai Prakash Ranjan
<saiprakash.ranjan@...eaurora.org> wrote:
>
> Hi Will,
>
> On 2020-01-16 21:02, Will Deacon wrote:
> > [+Jeffrey]
> >
> > On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
> >> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
> >> are not affected by Spectre variant 2. Add them to spectre_v2
> >> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
> >> vulnerability sysfs value.
> >>
> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
> >> ---
> >> arch/arm64/include/asm/cputype.h | 6 ++++++
> >> arch/arm64/kernel/cpu_errata.c | 3 +++
> >> 2 files changed, 9 insertions(+)
> >>
> >> diff --git a/arch/arm64/include/asm/cputype.h
> >> b/arch/arm64/include/asm/cputype.h
> >> index aca07c2f6e6e..7219cddeba66 100644
> >> --- a/arch/arm64/include/asm/cputype.h
> >> +++ b/arch/arm64/include/asm/cputype.h
> >> @@ -85,6 +85,9 @@
> >> #define QCOM_CPU_PART_FALKOR_V1 0x800
> >> #define QCOM_CPU_PART_FALKOR 0xC00
> >> #define QCOM_CPU_PART_KRYO 0x200
> >> +#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
> >> +#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
> >> +#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
> >
> > Jeffrey is the only person I know who understands the CPU naming here,
> > so
> > I've added him in case this needs either renaming or extending to cover
> > other CPUs. I wouldn't be at all surprised if we need a function call
> > rather than a bunch of table entries...
> >
> > That said, the internet claims that KRYO4XX gold is based on
> > Cortex-A76,
> > and so CSV2 should be set...
> >
>
> Yes the internet claims are true and CSV2 is set. SANITY check logs in
> here show ID_PFR0_EL1 - https://lore.kernel.org/patchwork/patch/1138457/
I'm probably just being a noob here and am confused, but if CSV2 is
set then why do you need your patch at all? The code I see says that
if CSV2 is set then we don't even check the spectre_v2_safe_list().
-Doug
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