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Message-ID: <3292551ef07b2c5354d48faedad849ff@kernel.org>
Date: Thu, 16 Jan 2020 07:28:49 +0000
From: Marc Zyngier <maz@...nel.org>
To: Will Deacon <will@...nel.org>
Cc: Steven Price <steven.price@....com>,
Catalin Marinas <catalin.marinas@....com>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
kvmarm@...ts.cs.columbia.edu
Subject: Re: [PATCH v5 0/3] arm64: Workaround for Cortex-A55 erratum 1530923
On 2020-01-14 16:45, Will Deacon wrote:
> On Mon, Dec 16, 2019 at 11:56:28AM +0000, Steven Price wrote:
>> Version 5 is a rebasing of version 4 (no changes).
>>
>> This series enables a workaround for Cortex-A55 erratum 1530923. The
>> erratum potentially allows TLB entries to be allocated as a result of
>> a
>> speculative AT instruction. This may happen in the middle of a guest
>> world switch while the relevant VMSA configuration is in an
>> inconsistent
>> state, leading to erroneous content being allocated into TLBs.
>>
>> There are existing workarounds for similar issues, 1165522 is
>> effectively the same, and 1319367/1319537 is similar but without VHE
>> support. Rather than add to the selection of errata, the first patch
>> renames 1165522 to WORKAROUND_SPECULATIVE_AT which can be reused (in
>> the
>> final patch) for 1530923.
>>
>> The workaround for errata 1319367 and 1319537 although similar cannot
>> use VHE (not available on those CPUs) so cannot share the workaround.
>> However, to keep some sense of symmetry the workaround is renamed to
>> SPECULATIVE_AT_NVHE.
>>
>> Changes since v4:
>> * Rebased to v5.5-rc1
>
> Looks fine to me. Marc, are you ok with me queueing this via arm64
> (that's
> where the existing workarounds came from), or would you prefer to take
> them
> via kvm-arm?
Please go ahead and take it (with my ack) via the arm64 tree.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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