linux-kernel - Re: [PATCH v3] mmc: sdhci: fix minimum clock rate for v3 controller

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Message-ID: <CAPDyKFqTW3kahiZpc==PTatadj3H-MO6gkddro3aEdThnnLSQg@mail.gmail.com>
Date:   Thu, 16 Jan 2020 15:39:58 +0100
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Michał Mirosław <mirq-linux@...e.qmqm.pl>
Cc:     Adrian Hunter <adrian.hunter@...el.com>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3] mmc: sdhci: fix minimum clock rate for v3 controller

On Wed, 15 Jan 2020 at 10:54, Michał Mirosław <mirq-linux@...e.qmqm.pl> wrote:
>
> For SDHCIv3+ with programmable clock mode, minimal clock frequency is
> still base clock / max(divider). Minimal programmable clock frequency is
> always greater than minimal divided clock frequency. Without this patch,
> SDHCI uses out-of-spec initial frequency when multiplier is big enough:
>
> mmc1: mmc_rescan_try_freq: trying to init card at 468750 Hz
> [for 480 MHz source clock divided by 1024]
>
> The code in sdhci_calc_clk() already chooses a correct SDCLK clock mode.
>
> Cc: stable@...r.kernel.org
> Fixes: c3ed3877625f ("mmc: sdhci: add support for programmable clock mode")
> Signed-off-by: Michał Mirosław <mirq-linux@...e.qmqm.pl>

Applied for fixes, thanks!

Kind regards
Uffe


> ---
>  v3: commitmsg/comment rewording
>  v2: extend commitmsg and add comment
> ---
>  drivers/mmc/host/sdhci.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 96609c961465..24fb6d710de6 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -3903,11 +3903,13 @@ int sdhci_setup_host(struct sdhci_host *host)
>         if (host->ops->get_min_clock)
>                 mmc->f_min = host->ops->get_min_clock(host);
>         else if (host->version >= SDHCI_SPEC_300) {
> -               if (host->clk_mul) {
> -                       mmc->f_min = (host->max_clk * host->clk_mul) / 1024;
> +               if (host->clk_mul)
>                         max_clk = host->max_clk * host->clk_mul;
> -               } else
> -                       mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
> +               /*
> +                * Divided Clock Mode minimum clock rate is always less than
> +                * Programmable Clock Mode minimum clock rate.
> +                */
> +               mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
>         } else
>                 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200;
>
> --
> 2.20.1
>