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Message-ID: <1a114449-8026-b99d-a4ce-93aac2ffdcb3@codeaurora.org>
Date: Thu, 16 Jan 2020 08:42:16 -0700
From: Jeffrey Hugo <jhugo@...eaurora.org>
To: Will Deacon <will@...nel.org>,
Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Cc: Mark Rutland <mark.rutland@....com>, Marc Zyngier <maz@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
Douglas Anderson <dianders@...omium.org>,
Matthias Kaehlcke <mka@...omium.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Andre Przywara <andre.przywara@....com>,
James Morse <james.morse@....com>,
Stephen Boyd <swboyd@...omium.org>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
On 1/16/2020 8:32 AM, Will Deacon wrote:
> [+Jeffrey]
>
> On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
>> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
>> are not affected by Spectre variant 2. Add them to spectre_v2
>> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
>> vulnerability sysfs value.
>>
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
>> ---
>> arch/arm64/include/asm/cputype.h | 6 ++++++
>> arch/arm64/kernel/cpu_errata.c | 3 +++
>> 2 files changed, 9 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
>> index aca07c2f6e6e..7219cddeba66 100644
>> --- a/arch/arm64/include/asm/cputype.h
>> +++ b/arch/arm64/include/asm/cputype.h
>> @@ -85,6 +85,9 @@
>> #define QCOM_CPU_PART_FALKOR_V1 0x800
>> #define QCOM_CPU_PART_FALKOR 0xC00
>> #define QCOM_CPU_PART_KRYO 0x200
>> +#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
>> +#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
>> +#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
>
> Jeffrey is the only person I know who understands the CPU naming here, so
> I've added him in case this needs either renaming or extending to cover
> other CPUs. I wouldn't be at all surprised if we need a function call
> rather than a bunch of table entries...
The added lines look sane to me, from a naming and MIDR perspective. I
don't know off hand if these CPUs are really fixed or not.
I wonder why a "KRYO_3XX_GOLD 0x802" line is not being added. Sai?
>
> That said, the internet claims that KRYO4XX gold is based on Cortex-A76,
> and so CSV2 should be set...
>
> Will
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
Jeffrey Hugo
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
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