[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20200116164300.6705-73-sashal@kernel.org>
Date: Thu, 16 Jan 2020 11:40:48 -0500
From: Sasha Levin <sashal@...nel.org>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc: "S.j. Wang" <shengjiu.wang@....com>,
Daniel Baluta <daniel.baluta@....com>,
Shawn Guo <shawnguo@...nel.org>,
Sasha Levin <sashal@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH AUTOSEL 5.4 073/205] arm64: dts: imx8mm-evk: Assigned clocks for audio plls
From: "S.j. Wang" <shengjiu.wang@....com>
[ Upstream commit e8b395b23643ca26e62a3081130d895e198c6154 ]
Assign clocks and clock-rates for audio plls, that audio
drivers can utilize them.
Add dai-tdm-slot-num and dai-tdm-slot-width for sound-wm8524,
that sai driver can generate correct bit clock.
Fixes: 13f3b9fdef6c ("arm64: dts: imx8mm-evk: Enable audio codec wm8524")
Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>
Reviewed-by: Daniel Baluta <daniel.baluta@....com>
Signed-off-by: Shawn Guo <shawnguo@...nel.org>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 2 ++
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
index f7a15f3904c2..13137451b438 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
@@ -62,6 +62,8 @@
cpudai: simple-audio-card,cpu {
sound-dai = <&sai3>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
};
simple-audio-card,codec {
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 23c8fad7932b..0435c64c92c8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -479,14 +479,18 @@
<&clk IMX8MM_CLK_AUDIO_AHB>,
<&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
<&clk IMX8MM_SYS_PLL3>,
- <&clk IMX8MM_VIDEO_PLL1>;
+ <&clk IMX8MM_VIDEO_PLL1>,
+ <&clk IMX8MM_AUDIO_PLL1>,
+ <&clk IMX8MM_AUDIO_PLL2>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
<&clk IMX8MM_SYS_PLL1_800M>;
assigned-clock-rates = <0>,
<400000000>,
<400000000>,
<750000000>,
- <594000000>;
+ <594000000>,
+ <393216000>,
+ <361267200>;
};
src: reset-controller@...90000 {
--
2.20.1
Powered by blists - more mailing lists