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Message-ID: <7d4934675dee1bb4ecfbef551ea7c2e363a452de.camel@toradex.com>
Date: Mon, 20 Jan 2020 07:59:46 +0000
From: Marcel Ziswiler <marcel.ziswiler@...adex.com>
To: "sam@...nborg.org" <sam@...nborg.org>
CC: "info@...ictechno.com" <info@...ictechno.com>,
"thierry.reding@...il.com" <thierry.reding@...il.com>,
"airlied@...ux.ie" <airlied@...ux.ie>,
Philippe Schenker <philippe.schenker@...adex.com>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"j.bauer@...rich.com" <j.bauer@...rich.com>,
"daniel@...ll.ch" <daniel@...ll.ch>
Subject: Re: [PATCH v3 2/3] drm/panel: simple: add display timings for logic
technologies displays
Hi Sam
On Sun, 2020-01-19 at 23:47 +0100, Sam Ravnborg wrote:
> Hi Marcel.
>
> On Sun, Jan 19, 2020 at 11:02:03PM +0100, Marcel Ziswiler wrote:
> > From: Marcel Ziswiler <marcel.ziswiler@...adex.com>
> >
> > Add display timings for the following 3 display panels manufactured
> > by
> > Logic Technologies Limited:
> >
> > - LT161010-2NHC e.g. as found in the Toradex Capacitive Touch
> > Display
> > 7" Parallel [1]
> > - LT161010-2NHR e.g. as found in the Toradex Resistive Touch
> > Display 7"
> > Parallel [2]
> > - LT170410-2WHC e.g. as found in the Toradex Capacitive Touch
> > Display
> > 10.1" LVDS [3]
> >
> > Those panels may also be distributed by Endrich Bauelemente
> > Vertriebs
> > GmbH [4].
> >
> > [1]
> > https://docs.toradex.com/104497-7-inch-parallel-capacitive-touch-display-800x480-datasheet.pdf
> > [2]
> > https://docs.toradex.com/104498-7-inch-parallel-resistive-touch-display-800x480.pdf
> > [3]
> > https://docs.toradex.com/105952-10-1-inch-lvds-capacitive-touch-display-1280x800-datasheet.pdf
> > [4]
> > https://www.endrich.com/isi50_isi30_tft-displays/lt170410-1whc_isi30
> >
> > Signed-off-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>
> > Reviewed-by: Philippe Schenker <philippe.schenker@...adex.com>
> >
> > ---
> >
> > Changes in v3:
> > - Fix typo in pixelclock frequency for lt170410_2whc as recently
> > discovered by Philippe.
> >
> > Changes in v2:
> > - Added Philippe's reviewed-by.
> >
> > drivers/gpu/drm/panel/panel-simple.c | 65
> > ++++++++++++++++++++++++++++
> > 1 file changed, 65 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/panel/panel-simple.c
> > b/drivers/gpu/drm/panel/panel-simple.c
> > index d6f77bc494c7..4140e0faff06 100644
> > --- a/drivers/gpu/drm/panel/panel-simple.c
> > +++ b/drivers/gpu/drm/panel/panel-simple.c
> > @@ -2107,6 +2107,62 @@ static const struct panel_desc lg_lp129qe =
> > {
> > },
> > };
> >
> > +static const struct display_timing logictechno_lt161010_2nh_timing
> > = {
> > + .pixelclock = { 26400000, 33300000, 46800000 },
> > + .hactive = { 800, 800, 800 },
> > + .hfront_porch = { 16, 210, 354 },
> > + .hback_porch = { 46, 46, 46 },
> > + .hsync_len = { 1, 20, 40 },
> > + .vactive = { 480, 480, 480 },
> > + .vfront_porch = { 7, 22, 147 },
> > + .vback_porch = { 23, 23, 23 },
> > + .vsync_len = { 1, 10, 20 },
> > + .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
> > + DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE
> > |
> > + DISPLAY_FLAGS_SYNC_POSEDGE,
> > +};
> > +
> > +static const struct panel_desc logictechno_lt161010_2nh = {
> > + .timings = &logictechno_lt161010_2nh_timing,
> > + .num_timings = 1,
> > + .size = {
> > + .width = 154,
> > + .height = 86,
> > + },
> > + .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
> > + .bus_flags = DRM_BUS_FLAG_DE_HIGH |
> > + DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE |
> > + DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE,
> > +};
> connector_type needs to be specified for all panels.
> This is something we have added recently and is today mandatory
> for new panel-simple panels.
Sorry, forgot about that one. Will add it in v4.
> Also please re-order so we add bindings before we driver support for
> the panels.
> This makes checkpatch (and me) more happy.
Not that my checkpatch would warn me about that but kinda makes sense.
> Ohh, and bonus points for using display_timing and specifying
> min,typ,max values.
Thanks, man.
> Sam
Cheers
Marcel
> > +
> > +static const struct display_timing
> > logictechno_lt170410_2whc_timing = {
> > + .pixelclock = { 68900000, 71100000, 73400000 },
> > + .hactive = { 1280, 1280, 1280 },
> > + .hfront_porch = { 23, 60, 71 },
> > + .hback_porch = { 23, 60, 71 },
> > + .hsync_len = { 15, 40, 47 },
> > + .vactive = { 800, 800, 800 },
> > + .vfront_porch = { 5, 7, 10 },
> > + .vback_porch = { 5, 7, 10 },
> > + .vsync_len = { 6, 9, 12 },
> > + .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
> > + DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE
> > |
> > + DISPLAY_FLAGS_SYNC_POSEDGE,
> > +};
> > +
> > +static const struct panel_desc logictechno_lt170410_2whc = {
> > + .timings = &logictechno_lt170410_2whc_timing,
> > + .num_timings = 1,
> > + .size = {
> > + .width = 217,
> > + .height = 136,
> > + },
> > + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
> > + .bus_flags = DRM_BUS_FLAG_DE_HIGH |
> > + DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE |
> > + DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE,
> > +};
> > +
> > static const struct drm_display_mode mitsubishi_aa070mc01_mode = {
> > .clock = 30400,
> > .hdisplay = 800,
> > @@ -3417,6 +3473,15 @@ static const struct of_device_id
> > platform_of_match[] = {
> > }, {
> > .compatible = "logicpd,type28",
> > .data = &logicpd_type_28,
> > + }, {
> > + .compatible = "logictechno,lt161010-2nhc",
> > + .data = &logictechno_lt161010_2nh,
> > + }, {
> > + .compatible = "logictechno,lt161010-2nhr",
> > + .data = &logictechno_lt161010_2nh,
> > + }, {
> > + .compatible = "logictechno,lt170410-2whc",
> > + .data = &logictechno_lt170410_2whc,
> > }, {
> > .compatible = "mitsubishi,aa070mc01-ca1",
> > .data = &mitsubishi_aa070mc01,
> > --
> > 2.24.1
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