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Message-ID: <AFAA8AA0CH7o6kMJF-XfXKq9.3.1579584019640.Hmail.wenhu.wang@vivo.com>
Date: Tue, 21 Jan 2020 13:20:19 +0800 (GMT+08:00)
From: 王文虎 <wenhu.wang@...o.com>
To: Scott Wood <oss@...error.net>
Cc: wangwenhu <wenhu.pku@...il.com>,
Kumar Gala <galak@...nel.crashing.org>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
trivial@...nel.org, Rai Harninder <harninder.rai@....com>
Subject: Re:[PATCH] powerpc/Kconfig: Make FSL_85XX_CACHE_SRAM configurable
From: Scott Wood <oss@...error.net>
Date: 2020-01-21 11:25:25
To: wangwenhu <wenhu.pku@...il.com>,Kumar Gala <galak@...nel.crashing.org>,Benjamin Herrenschmidt <benh@...nel.crashing.org>,Paul Mackerras <paulus@...ba.org>,Michael Ellerman <mpe@...erman.id.au>,linuxppc-dev@...ts.ozlabs.org,linux-kernel@...r.kernel.org
Cc: trivial@...nel.org,wenhu.wang@...o.com,Rai Harninder <harninder.rai@....com>
Subject: Re: [PATCH] powerpc/Kconfig: Make FSL_85XX_CACHE_SRAM configurable>On Mon, 2020-01-20 at 06:43 -0800, wangwenhu wrote:
>> From: wangwenhu <wenhu.wang@...o.com>
>>
>> When generating .config file with menuconfig on Freescale BOOKE
>> SOC, FSL_85XX_CACHE_SRAM is not configurable for the lack of
>> description in the Kconfig field, which makes it impossible
>> to support L2Cache-Sram driver. Add a description to make it
>> configurable.
>>
>> Signed-off-by: wangwenhu <wenhu.wang@...o.com>
>
>The intent was that drivers using the SRAM API would select the symbol. What
>is the use case for selecting it manually?
>
With a repository of multiple products(meaning different defconfigs) and multiple
developers, the Kconfigs of the Kernel Source Tree change frequently. So the "make menuconfig"
process is needed for defconfigs' re-generating or updating for the complexity of dependencies
between different features defined in the Kconfigs.
>Since this code was added almost ten years ago and there are still no (in-
>tree?) users of the API, we should just remove the sram code (unless this
>prods someone to submit such a user very soon).
>
Yes, pretty long a time. But we DO really use the API now for PPCE500/Freescale SoC.
Like sometimes we need to reset the whole RAM, then the L2-Cache would be used as
SRAM for backup using. Since it is useful for us now, a re-consideration is recommanded.
>-Scott
>
>
--
Wenhu
vivo
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