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Message-ID: <747a1c94-8eee-f46a-fcc7-d111cd9df70d@linaro.org>
Date:   Wed, 22 Jan 2020 18:54:54 +0200
From:   Georgi Djakov <georgi.djakov@...aro.org>
To:     Artur Świgoń <a.swigon@...sung.com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org, dri-devel@...ts.freedesktop.org
Cc:     cw00.choi@...sung.com, myungjoo.ham@...sung.com,
        inki.dae@...sung.com, sw0312.kim@...sung.com,
        leonard.crestez@....com, m.szyprowski@...sung.com,
        b.zolnierkie@...sung.com, krzk@...nel.org
Subject: Re: [RFC PATCH v3 4/7] arm: dts: exynos: Add interconnect bindings
 for Exynos4412

Hi Artur,

Thank you for your continuous work on this.

On 12/20/19 13:56, Artur Świgoń wrote:
> This patch adds the following properties to the Exynos4412 DT:
>   - exynos,interconnect-parent-node: to declare connections between
>     nodes in order to guarantee PM QoS requirements between nodes;

Is this DT property documented somewhere? I believe that there should be a patch
to document it somewhere in Documentation/devicetree/bindings/ before using it.

Thanks,
Georgi

>   - #interconnect-cells: required by the interconnect framework.
> 
> Note that #interconnect-cells is always zero and node IDs are not
> hardcoded anywhere.
> 
> Signed-off-by: Artur Świgoń <a.swigon@...sung.com>
> ---
>  arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> index 4ce3d77a6704..d9d70eacfcaf 100644
> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> @@ -90,6 +90,7 @@
>  &bus_dmc {
>  	exynos,ppmu-device = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
>  	vdd-supply = <&buck1_reg>;
> +	#interconnect-cells = <0>;
>  	status = "okay";
>  };
>  
> @@ -106,6 +107,8 @@
>  &bus_leftbus {
>  	exynos,ppmu-device = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
>  	vdd-supply = <&buck3_reg>;
> +	exynos,interconnect-parent-node = <&bus_dmc>;
> +	#interconnect-cells = <0>;
>  	status = "okay";
>  };
>  
> @@ -116,6 +119,8 @@
>  
>  &bus_display {
>  	exynos,parent-bus = <&bus_leftbus>;
> +	exynos,interconnect-parent-node = <&bus_leftbus>;
> +	#interconnect-cells = <0>;
>  	status = "okay";
>  };
>  
> 

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