Message-ID: <1579689918-7181-1-git-send-email-yamonkar@cadence.com>
Date:   Wed, 22 Jan 2020 11:45:04 +0100
From:   Yuti Amonkar <yamonkar@...ence.com>
To:     <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <kishon@...com>, <robh+dt@...nel.org>, <mark.rutland@....com>,
        <maxime@...no.tech>
CC:     <jsarha@...com>, <tomi.valkeinen@...com>, <praneeth@...com>,
        <mparab@...ence.com>, <sjakhade@...ence.com>,
        <yamonkar@...ence.com>
Subject: [PATCH v3 00/14] PHY: Update Cadence Torrent PHY driver with reconfiguration

This patch series applies to the Cadence SD0801 PHY driver.
Cadence SD0801 PHY is also known as Torrent PHY. Torrent PHY
is a multiprotocol PHY supporting PHY configurations including
Display Port, USB and PCIe.

This patch series converts SD0801 PHY driver for DisplayPort into a
generic Torrent PHY driver, updates DisplayPort functionality with
reconfiguration support and finally adds platform dependent initialization
for TI J7 SoCs.

The patch series has following patches which applies the changes
in the below sequence
1. 001-dt-bindings-phy-Convert-Cadence-MHDP-PHY-bindings-to-YAML
This patch converts the MHDP PHY device tree bindings to yaml schemas
2. 002-phy-cadence-dp-Rename-to-phy-Cadence-Torrent
Rename Cadence DP PHY driver from phy-cadence-dp to phy-cadence-torrent
3. 003-phy-cadence-torrent-Adopt-Torrent-nomenclature
Update private data structures, module descriptions and functions prefix to Torrent
4. 004-phy-cadence-torrent-Add-wrapper-for-PHY-register-access
Add a wrapper function to write Torrent PHY registers to improve code readability.
5. 005-phy-cadence-torrent-Add-wrapper-for-DPTX-register-access
Add wrapper functions to read, write DisplayPort specific PHY registers to improve code
readability.
6. 006-phy-cadence-torrent-Refactor-code-for-reusability
Add separate function to set different power state values.
Use of uniform polling timeout value. Check return values of functions for error handling.
7. 007-phy-cadence-torrent-Add-19.2-MHz-reference-clock-support
Add configuration functions for 19.2 MHz reference clock support. Add register configurations
for SSC support.
8. 008-phy-cadence-torrent-Implement-phy-configure-APIs
Add PHY configuration APIs for link rate, number of lanes, voltage swing and pre-emphasis values.
9. 009-phy-cadence-torrent-Use-regmap-to-read-and-write-Torrent-PHY-registers 
Use regmap for accessing Torrent PHY registers. Update register offsets. Abstract address
calculation using regmap APIs.
10. 010-phy: cadence-torrent-Use-regmap-to-read-and-write-DPTX-PHY-registers
Use regmap to read and write DPTX specific PHY registers.
11. 011-dt-bindings-phy-phy-cadence-torrent-Add-platform-dependent-compatible-string
Add a new compatible string used for TI SoCs using Torrent PHY.
12. 012-phy-cadence-torrent-Add-platform-dependent-initialization-structure
Add platform dependent initialization data for Torrent PHY used in TI's J721E SoC.
13. 013-phy-cadence-torrent-dt-bindings-Add-subnode-bindings. 
Add sub-node bindings.
14. 014-phy: cadence-torrent-Add-support-for-subnode-bindings
Implement single link subnode support to the phy driver.

Version History:

v3:
- Removed "Add clock binding" patch from the series and merged it with
  "Convert-Cadence-MHDP-PHY-bindings-to-YAML" patch.
- Added reset and reset-names properties to YAML file.
- Updated dptx_phy reg entry as optional in YAML.
- Renamed reg-names from sd0801_phy to torrent_phy.
- Added subnode property for each group of PHY lanes based on PHY
  type to the YAML. Renamed num_lanes and max_bit_rate to cdns,num-lanes 
  and cdns,max-bit-rate and moved it to subnode properties. 
- Added cdns,phy-type property in subnode. Currently cdns,phy-type supports only
  PHY_TYPE_DP.
- Added subnode instance structure to the driver in reference to the dts change.
- Updated functions to read properties from child node instead of parent node.
- Added num_lanes as argument to the cdns_torrent_dp_run function.

v2:
- Remove patch [1] from this series and send for a separate review.
- Use enum in compatible property of YAML file.
- Remove quotes in clock-names property "refclk" -> refclk in YAML file.
- Add reg-names property to YAML file
- Add additionalProperties:false to YAML file.
- No change in the driver code.

This patch series is dependent on PHY DisplayPort configuration patch [1].

[1]

https://lkml.org/lkml/2020/1/6/279

Swapnil Jakhade (11):
  phy: cadence-torrent: Adopt Torrent nomenclature
  phy: cadence-torrent: Add wrapper for PHY register access
  phy: cadence-torrent: Add wrapper for DPTX register access
  phy: cadence-torrent: Refactor code for reusability
  phy: cadence-torrent: Add 19.2 MHz reference clock support
  phy: cadence-torrent: Implement PHY configure APIs
  phy: cadence-torrent: Use regmap to read and write Torrent PHY
    registers
  phy: cadence-torrent: Use regmap to read and write DPTX PHY registers
  phy: cadence-torrent: Add platform dependent initialization structure
  dt-bindings: phy: phy-cadence-torrent: Add subnode bindings.
  phy: cadence-torrent: Add support for subnode bindings

Yuti Amonkar (3):
  dt-bindings: phy: Convert Cadence MHDP PHY bindings to YAML.
  phy: cadence-dp: Rename to phy-cadence-torrent
  dt-bindings: phy: phy-cadence-torrent: Add platform dependent
    compatible string

 .../devicetree/bindings/phy/phy-cadence-dp.txt     |   30 -
 .../bindings/phy/phy-cadence-torrent.yaml          |  140 ++
 drivers/phy/cadence/Kconfig                        |    6 +-
 drivers/phy/cadence/Makefile                       |    2 +-
 drivers/phy/cadence/phy-cadence-dp.c               |  541 ------
 drivers/phy/cadence/phy-cadence-torrent.c          | 1945 ++++++++++++++++++++
 6 files changed, 2089 insertions(+), 575 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/phy/phy-cadence-dp.txt
 create mode 100644 Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
 delete mode 100644 drivers/phy/cadence/phy-cadence-dp.c
 create mode 100644 drivers/phy/cadence/phy-cadence-torrent.c

-- 
2.4.5

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