linux-kernel - Re: [PATCH v3 5/6] clk: zynqmp: Fix divider calculation

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Date:   Thu, 23 Jan 2020 14:58:59 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Rajan Vaja <rajan.vaja@...inx.com>, gustavo@...eddedor.com,
        jolly.shah@...inx.com, m.tretter@...gutronix.de,
        mark.rutland@....com, mdf@...nel.org, michal.simek@...inx.com,
        mturquette@...libre.com, nava.manne@...inx.com, robh+dt@...nel.org,
        tejas.patel@...inx.com
Cc:     linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Rajan Vaja <rajan.vaja@...inx.com>
Subject: Re: [PATCH v3 5/6] clk: zynqmp: Fix divider calculation

Quoting Rajan Vaja (2019-12-04 22:35:58)
> zynqmp_clk_divider_round_rate() returns actual divider value
> after calculating from parent rate and desired rate, even though
> that rate is not supported by single divider of hardware. It is
> also possible that such divisor value can be achieved through 2
> different dividers. As, Linux tries to set such divisor value(out
> of range) in single divider set divider is getting failed.
> 
> Fix the same by computing best possible combination of two
> divisors which provides more accurate clock rate.
> 
> Signed-off-by: Michal Simek <michal.simek@...inx.com>
> Signed-off-by: Tejas Patel <tejas.patel@...inx.com>
> Signed-off-by: Rajan Vaja <rajan.vaja@...inx.com>
> ---

Applied to clk-next