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Message-ID: <8c942ea0-0ef0-6f6d-8336-927b6ba8729f@baylibre.com>
Date: Thu, 23 Jan 2020 10:56:21 +0100
From: Neil Armstrong <narmstrong@...libre.com>
To: Remi Pommarel <repk@...plefau.lt>,
Kishon Vijay Abraham I <kishon@...com>,
Yue Wang <yue.wang@...ogic.com>,
Kevin Hilman <khilman@...libre.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Rob Herring <robh+dt@...nel.org>
Cc: Jerome Brunet <jbrunet@...libre.com>,
linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v5 4/7] arm64: dts: meson-axg: Add PCIE PHY nodes
On 16/01/2020 12:18, Remi Pommarel wrote:
> Enable both PCIE and shared MIPI/PCIE PHY nodes in order to make PCIE
> reliable on AXG SoC.
>
> Signed-off-by: Remi Pommarel <repk@...plefau.lt>
> ---
> arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index 04803c3bccfa..08a178aa0133 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -12,6 +12,7 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
> #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
> +#include <dt-bindings/phy/phy.h>
>
> / {
> compatible = "amlogic,meson-axg";
> @@ -1104,6 +1105,12 @@ hiubus: bus@...3c000 {
> #size-cells = <2>;
> ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
>
> + mipi_analog_phy: phy@0 {
> + compatible = "amlogic,axg-mipi-pcie-analog-phy";
> + reg = <0x0 0x0 0x0 0xc>;
> + #phy-cells = <1>;
> + };
> +
> sysctrl: system-controller@0 {
> compatible = "amlogic,meson-axg-hhi-sysctrl",
> "simple-mfd", "syscon";
> @@ -1356,6 +1363,15 @@ tdmout_c: audio-controller@580 {
> };
> };
>
> + pcie_phy: bus@...44000 {
> + compatible = "amlogic,axg-pcie-phy";
> + reg = <0x0 0xff644000 0x0 0x1c>;
> + resets = <&reset RESET_PCIE_PHY>;
> + phys = <&mipi_analog_phy PHY_TYPE_PCIE>;
> + phy-names = "analog";
> + #phy-cells = <0>;
> + };
> +
> aobus: bus@...00000 {
> compatible = "simple-bus";
> reg = <0x0 0xff800000 0x0 0x100000>;
>
Reviewed-by: Neil Armstrong <narmstrong@...libre.com>
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