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Message-ID: <1c5eda42-b28c-ea98-048b-77a94c8da545@xilinx.com>
Date: Thu, 23 Jan 2020 13:07:41 +0100
From: Michal Simek <michal.simek@...inx.com>
To: Kalyani Akula <kalyani.akula@...inx.com>,
herbert@...dor.apana.org.au, davem@...emloft.net, monstr@...nam.cz,
linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
git-dev <git-dev@...inx.com>,
Mohan Marutirao Dhanawade <mohand@...inx.com>,
Sarat Chand Savitala <saratcha@...inx.com>,
Harsh Jain <harshj@...inx.com>,
Michal Simek <michal.simek@...inx.com>,
Kalyani Akula <kalyania@...inx.com>
Subject: Re: [PATCH V5 2/4] dt-bindings: crypto: Add bindings for ZynqMP
AES-GCM driver
On 23. 01. 20 12:11, Kalyani Akula wrote:
> Add documentation to describe Xilinx ZynqMP AES-GCM driver bindings.
>
> Signed-off-by: Kalyani Akula <kalyani.akula@...inx.com>
> ---
>
> V5 Changes:
> - Moved dt-bindings patch from 1/4 to 2/4
> - Converted dt-bindings from .txt to .yaml format.
>
> .../bindings/crypto/xlnx,zynqmp-aes.yaml | 37 ++++++++++++++++++++++
> 1 file changed, 37 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml
>
> diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml
> new file mode 100644
> index 0000000..b2bca4b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml
> @@ -0,0 +1,37 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-aes.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx ZynqMP AES-GCM Hardware Accelerator Device Tree Bindings
> +
> +maintainers:
> + - Kalyani Akula <kalyani.akula@...inx.com>
> + - Michal Simek <michal.simek@...inx.com>
> +
> +description: |
> + The ZynqMP AES-GCM hardened cryptographic accelerator is used to
> + encrypt or decrypt the data with provided key and initialization vector.
> +
> +properties:
> + compatible:
> + const: xlnx,zynqmp-aes
> +
> +required:
> + - compatible
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + firmware {
> + zynqmp_firmware: zynqmp-firmware {
> + compatible = "xlnx,zynqmp-firmware";
> + method = "smc";
> + xlnx_aes: zynqmp-aes {
> + compatible = "xlnx,zynqmp-aes";
> + };
> + };
> + };
> +...
>
Rob: dtbs_check looks good to me. This binding is aligned with other
clock, reset, pl binding coming to this node that's why
Acked-by: Michal Simek <michal.simek@...inx.com>
Thanks,
Michal
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