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Message-ID: <dcecb179-02f1-0608-6a84-5b2dd0bbcdb3@arm.com>
Date: Thu, 23 Jan 2020 17:04:32 +0000
From: Valentin Schneider <valentin.schneider@....com>
To: Ionela Voinescu <ionela.voinescu@....com>, catalin.marinas@....com,
will@...nel.org, mark.rutland@....com, maz@...nel.org,
suzuki.poulose@....com, sudeep.holla@....com,
dietmar.eggemann@....com
Cc: peterz@...radead.org, mingo@...hat.com, ggherdovich@...e.cz,
vincent.guittot@...aro.org, linux-arm-kernel@...ts.infradead.org,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
Steve Capper <steve.capper@....com>
Subject: Re: [PATCH v2 2/6] arm64: trap to EL1 accesses to AMU counters from
EL0
On 18/12/2019 18:26, Ionela Voinescu wrote:
> +/*
> + * reset_amuserenr_el0 - reset AMUSERENR_EL0 if AMUv1 present
> + */
> + .macro reset_amuserenr_el0, tmpreg
> + mrs \tmpreg, id_aa64pfr0_el1 // Check ID_AA64PFR0_EL1
> + ubfx \tmpreg, \tmpreg, #ID_AA64PFR0_AMU_SHIFT, #4
> + cbz \tmpreg, 9000f // Skip if no AMU present
> + msr_s SYS_AMUSERENR_EL0, xzr // Disable AMU access from EL0
> +9000:
AIUI you can steer away from the obscure numbering scheme and define the
label using the macro counter:
cbz \tmpreg, .Lskip_\@
[...]
.Lskip_\@:
.endm
> + .endm
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