linux-kernel - [PATCH AUTOSEL 4.4 2/9] clk: mmp2: Fix the order of timer mux parents

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Message-Id: <20200124142221.31201-2-sashal@kernel.org>
Date:   Fri, 24 Jan 2020 09:22:14 -0500
From:   Sasha Levin <sashal@...nel.org>
To:     linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc:     Lubomir Rintel <lkundrak@...sk>, Stephen Boyd <sboyd@...nel.org>,
        Olof Johansson <olof@...om.net>,
        Sasha Levin <sashal@...nel.org>, linux-clk@...r.kernel.org
Subject: [PATCH AUTOSEL 4.4 2/9] clk: mmp2: Fix the order of timer mux parents

From: Lubomir Rintel <lkundrak@...sk>

[ Upstream commit 8bea5ac0fbc5b2103f8779ddff216122e3c2e1ad ]

Determined empirically, no documentation is available.

The OLPC XO-1.75 laptop used parent 1, that one being VCTCXO/4 (65MHz), but
thought it's a VCTCXO/2 (130MHz). The mmp2 timer driver, not knowing
what is going on, ended up just dividing the rate as of
commit f36797ee4380 ("ARM: mmp/mmp2: dt: enable the clock")'

Link: https://lore.kernel.org/r/20191218190454.420358-3-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@...sk>
Acked-by: Stephen Boyd <sboyd@...nel.org>
Signed-off-by: Olof Johansson <olof@...om.net>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
 drivers/clk/mmp/clk-of-mmp2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c
index 8b45cb2caed1b..60db6531996eb 100644
--- a/drivers/clk/mmp/clk-of-mmp2.c
+++ b/drivers/clk/mmp/clk-of-mmp2.c
@@ -134,7 +134,7 @@ static DEFINE_SPINLOCK(ssp3_lock);
 static const char *ssp_parent_names[] = {"vctcxo_4", "vctcxo_2", "vctcxo", "pll1_16"};
 
 static DEFINE_SPINLOCK(timer_lock);
-static const char *timer_parent_names[] = {"clk32", "vctcxo_2", "vctcxo_4", "vctcxo"};
+static const char *timer_parent_names[] = {"clk32", "vctcxo_4", "vctcxo_2", "vctcxo"};
 
 static DEFINE_SPINLOCK(reset_lock);
 
-- 
2.20.1