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Message-Id: <20200124163001.28910-8-jbx6244@gmail.com>
Date: Fri, 24 Jan 2020 17:29:58 +0100
From: Johan Jonker <jbx6244@...il.com>
To: miquel.raynal@...tlin.com
Cc: richard@....at, vigneshr@...com, robh+dt@...nel.org,
mark.rutland@....com, heiko@...ech.de,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
shawn.lin@...k-chips.com, yifeng.zhao@...k-chips.com
Subject: [RFC PATCH v2 07/10] arm64: dts: rockchip: add nandc node for px30
From: Dingqiang Lin <jon.lin@...k-chips.com>
Add nandc node for px30.
Signed-off-by: Dingqiang Lin <jon.lin@...k-chips.com>
Signed-off-by: Johan Jonker <jbx6244@...il.com>
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 8812b70f3..5560e5b35 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -865,6 +865,18 @@
status = "disabled";
};
+ nandc: nand-controller@...b0000 {
+ compatible = "rockchip,px30-nand-controller";
+ reg = <0x0 0xff3b0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
+ clock-names = "hclk_nandc", "clk_nandc";
+ assigned-clocks = <&cru SCLK_NANDC>;
+ assigned-clock-parents = <&cru SCLK_NANDC_DIV50>;
+ power-domains = <&power PX30_PD_MMC_NAND>;
+ status = "disabled";
+ };
+
vopb: vop@...60000 {
compatible = "rockchip,px30-vop-big";
reg = <0x0 0xff460000 0x0 0xefc>;
--
2.11.0
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