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Message-Id: <872477f7c7552d3bb7baf0b302398fcd42c5fcfd.1579885334.git.christophe.leroy@c-s.fr>
Date: Fri, 24 Jan 2020 17:03:48 +0000 (UTC)
From: Christophe Leroy <christophe.leroy@....fr>
To: Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>
Cc: linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: [PATCH] powerpc/32: Add missing context synchronisation with
CONFIG_VMAP_STACK
After reactivation of data translation by modifying MSR[DR], a isync
is required to ensure the translation is effective.
Signed-off-by: Christophe Leroy <christophe.leroy@....fr>
---
Rebased on powerpc/merge-test
@mpe: If not too late:
- change to head_32.h should be squashed into "powerpc/32: prepare for CONFIG_VMAP_STACK"
- change to head_32.S should be squashed into "powerpc/32s: Enable CONFIG_VMAP_STACK"
Signed-off-by: Christophe Leroy <christophe.leroy@....fr>
---
arch/powerpc/kernel/head_32.S | 1 +
arch/powerpc/kernel/head_32.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index cb7864091641..0493fcac6409 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -277,6 +277,7 @@ MachineCheck:
#ifdef CONFIG_VMAP_STACK
li r11, MSR_KERNEL & ~(MSR_IR | MSR_RI) /* can take DTLB miss */
mtmsr r11
+ isync
#endif
#ifdef CONFIG_PPC_CHRP
mfspr r11, SPRN_SPRG_THREAD
diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_32.h
index 73a035b40dbf..a6a5fbbf8504 100644
--- a/arch/powerpc/kernel/head_32.h
+++ b/arch/powerpc/kernel/head_32.h
@@ -43,6 +43,7 @@
.ifeq \for_rtas
li r11, MSR_KERNEL & ~(MSR_IR | MSR_RI) /* can take DTLB miss */
mtmsr r11
+ isync
.endif
subi r11, r1, INT_FRAME_SIZE /* use r1 if kernel */
#else
@@ -123,6 +124,7 @@
#ifdef CONFIG_VMAP_STACK
li r9, MSR_KERNEL & ~(MSR_IR | MSR_RI) /* can take DTLB miss */
mtmsr r9
+ isync
#endif
tovirt_vmstack r12, r12
tophys_novmstack r11, r11
--
2.25.0
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