linux-kernel - Re: [PATCH v4 6/8] scsi: ufs: Add dev ref clock gating wait time support

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Message-ID: <328f4768-e986-8566-4929-17420f9dbbce@codeaurora.org>
Date:   Fri, 24 Jan 2020 10:06:52 -0800
From:   "Asutosh Das (asd)" <asutoshd@...eaurora.org>
To:     Can Guo <cang@...eaurora.org>, nguyenb@...eaurora.org,
        hongwus@...eaurora.org, rnayak@...eaurora.org,
        linux-scsi@...r.kernel.org, kernel-team@...roid.com,
        saravanak@...gle.com, salyzyn@...gle.com
Cc:     Alim Akhtar <alim.akhtar@...sung.com>,
        Avri Altman <avri.altman@....com>,
        Pedro Sousa <pedrom.sousa@...opsys.com>,
        "James E.J. Bottomley" <jejb@...ux.ibm.com>,
        "Martin K. Petersen" <martin.petersen@...cle.com>,
        Tomas Winkler <tomas.winkler@...el.com>,
        Stanley Chu <stanley.chu@...iatek.com>,
        Venkat Gopalakrishnan <venkatg@...eaurora.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 6/8] scsi: ufs: Add dev ref clock gating wait time
 support

On 1/22/2020 11:25 PM, Can Guo wrote:
> In UFS version 3.0, a newly added attribute bRefClkGatingWaitTime defines
> the minimum time for which the reference clock is required by device during
> transition to LS-MODE or HIBERN8 state. Make this change to reflect the new
> requirement by adding delays before turning off the clock.
> 
> Signed-off-by: Can Guo <cang@...eaurora.org>
> ---

Reviewed-by: Asutosh Das <asutoshd@...eaurora.org>

>   drivers/scsi/ufs/ufs.h    |  3 +++
>   drivers/scsi/ufs/ufshcd.c | 41 +++++++++++++++++++++++++++++++++++++++++
>   2 files changed, 44 insertions(+)
> 
> diff --git a/drivers/scsi/ufs/ufs.h b/drivers/scsi/ufs/ufs.h
> index 3327981..385bac8 100644
> --- a/drivers/scsi/ufs/ufs.h
> +++ b/drivers/scsi/ufs/ufs.h
> @@ -168,6 +168,7 @@ enum attr_idn {
>   	QUERY_ATTR_IDN_FFU_STATUS		= 0x14,
>   	QUERY_ATTR_IDN_PSA_STATE		= 0x15,
>   	QUERY_ATTR_IDN_PSA_DATA_SIZE		= 0x16,
> +	QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME	= 0x17,
>   };
>   
>   /* Descriptor idn for Query requests */
> @@ -530,6 +531,8 @@ struct ufs_dev_info {
>   	bool f_power_on_wp_en;
>   	/* Keeps information if any of the LU is power on write protected */
>   	bool is_lu_power_on_wp;
> +	u16 spec_version;
> +	u32 clk_gating_wait_us;
>   };
>   
>   #define MAX_MODEL_LEN 16
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> index c316a07..1ee2187 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -91,6 +91,9 @@
>   /* default delay of autosuspend: 2000 ms */
>   #define RPM_AUTOSUSPEND_DELAY_MS 2000
>   
> +/* Default value of wait time before gating device ref clock */
> +#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
> +
>   #define ufshcd_toggle_vreg(_dev, _vreg, _on)				\
>   	({                                                              \
>   		int _ret;                                               \
> @@ -3357,6 +3360,37 @@ static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
>   				      param_offset, param_read_buf, param_size);
>   }
>   
> +static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
> +{
> +	int err = 0;
> +	u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
> +
> +	if (hba->dev_info.spec_version >= 0x300) {
> +		err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
> +				QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
> +				&gating_wait);
> +		if (err)
> +			dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
> +					 err, gating_wait);
> +
> +		if (gating_wait == 0) {
> +			gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
> +			dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
> +					 gating_wait);
> +		}
> +
> +		/*
> +		 * bRefClkGatingWaitTime defines the minimum time for which the
> +		 * reference clock is required by device during transition from
> +		 * HS-MODE to LS-MODE or HIBERN8 state. Give it more time to be
> +		 * on the safe side.
> +		 */
> +		hba->dev_info.clk_gating_wait_us = gating_wait + 50;
> +	}
> +
> +	return err;
> +}
> +
>   /**
>    * ufshcd_memory_alloc - allocate memory for host memory space data structures
>    * @hba: per adapter instance
> @@ -6628,6 +6662,10 @@ static int ufs_get_device_desc(struct ufs_hba *hba,
>   	dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
>   				     desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
>   
> +	/* getting Specification Version in big endian format */
> +	hba->dev_info.spec_version = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
> +				      desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
> +
>   	model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
>   	err = ufshcd_read_string_desc(hba, model_index,
>   				      &dev_desc->model, SD_ASCII_STD);
> @@ -7046,6 +7084,9 @@ static int ufshcd_probe_hba(struct ufs_hba *hba)
>   
>   		/* clear any previous UFS device information */
>   		memset(&hba->dev_info, 0, sizeof(hba->dev_info));
> +
> +		ufshcd_get_ref_clk_gating_wait(hba);
> +
>   		if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
>   				QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
>   			hba->dev_info.f_power_on_wp_en = flag;
> 


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