lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <157989307309.396.12029128798763007003.tip-bot2@tip-bot2>
Date:   Fri, 24 Jan 2020 19:11:13 -0000
From:   "tip-bot2 for Yash Shah" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     "Wesley W. Terpstra" <wesley@...ive.com>,
        Atish Patra <atish.patra@....com>,
        Yash Shah <yash.shah@...ive.com>,
        Marc Zyngier <maz@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh@...nel.org>, x86 <x86@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>
Subject: [tip: irq/core] gpio/sifive: Add DT documentation for SiFive GPIO

The following commit has been merged into the irq/core branch of tip:

Commit-ID:     7875f8242494f8e4c8a75f2aeab4a6fb742599bd
Gitweb:        https://git.kernel.org/tip/7875f8242494f8e4c8a75f2aeab4a6fb742599bd
Author:        Yash Shah <yash.shah@...ive.com>
AuthorDate:    Tue, 10 Dec 2019 16:41:12 +05:30
Committer:     Marc Zyngier <maz@...nel.org>
CommitterDate: Mon, 20 Jan 2020 09:26:05 

gpio/sifive: Add DT documentation for SiFive GPIO

DT json-schema for GPIO controller added.

Signed-off-by: Wesley W. Terpstra <wesley@...ive.com>
[Atish: Compatible string update]
Signed-off-by: Atish Patra <atish.patra@....com>
Signed-off-by: Yash Shah <yash.shah@...ive.com>
Signed-off-by: Marc Zyngier <maz@...nel.org>
Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
Reviewed-by: Rob Herring <robh@...nel.org>
Link: https://lore.kernel.org/r/1575976274-13487-5-git-send-email-yash.shah@sifive.com
---
 Documentation/devicetree/bindings/gpio/sifive,gpio.yaml | 68 ++++++++-
 1 file changed, 68 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpio/sifive,gpio.yaml

diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
new file mode 100644
index 0000000..418e838
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/sifive,gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SiFive GPIO controller
+
+maintainers:
+  - Yash Shah <yash.shah@...ive.com>
+  - Paul Walmsley <paul.walmsley@...ive.com>
+
+properties:
+  compatible:
+    items:
+      - const: sifive,fu540-c000-gpio
+      - const: sifive,gpio0
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    description:
+      interrupt mapping one per GPIO. Maximum 16 GPIOs.
+    minItems: 1
+    maxItems: 16
+
+  interrupt-controller: true
+
+  "#interrupt-cells":
+    const: 2
+
+  clocks:
+    maxItems: 1
+
+  "#gpio-cells":
+    const: 2
+
+  gpio-controller: true
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-controller
+  - "#interrupt-cells"
+  - clocks
+  - "#gpio-cells"
+  - gpio-controller
+
+additionalProperties: false
+
+examples:
+  - |
+      #include <dt-bindings/clock/sifive-fu540-prci.h>
+      gpio@...60000 {
+        compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";
+        interrupt-parent = <&plic>;
+        interrupts = <7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22>;
+        reg = <0x0 0x10060000 0x0 0x1000>;
+        clocks = <&tlclk PRCI_CLK_TLCLK>;
+        gpio-controller;
+        #gpio-cells = <2>;
+        interrupt-controller;
+        #interrupt-cells = <2>;
+      };
+
+...

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ