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Message-Id: <20200124232014.574989-5-jernej.skrabec@siol.net>
Date:   Sat, 25 Jan 2020 00:20:10 +0100
From:   Jernej Skrabec <jernej.skrabec@...l.net>
To:     mripard@...nel.org, wens@...e.org
Cc:     mchehab@...nel.org, robh+dt@...nel.org, mark.rutland@....com,
        mturquette@...libre.com, sboyd@...nel.org,
        hverkuil-cisco@...all.nl, linux-media@...r.kernel.org,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-sunxi@...glegroups.com
Subject: [PATCH 4/8] arm64: dts: allwinner: a64: Fix display clock register range

Register range of display clocks is 0x10000, as it can be seen from
DE2 documentation.

Fix it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@...l.net>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 862b47dc9dc9..baa6f08dc108 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -264,7 +264,7 @@ bus@...0000 {
 
 			display_clocks: clock@0 {
 				compatible = "allwinner,sun50i-a64-de2-clk";
-				reg = <0x0 0x100000>;
+				reg = <0x0 0x10000>;
 				clocks = <&ccu CLK_BUS_DE>,
 					 <&ccu CLK_DE>;
 				clock-names = "bus",
-- 
2.25.0

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