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Message-ID: <c06260e3-bd19-bf3c-89f7-d36bdb9a5b20@redhat.com>
Date: Fri, 24 Jan 2020 10:11:34 +0100
From: Hans de Goede <hdegoede@...hat.com>
To: Thomas Gleixner <tglx@...utronix.de>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
vipul kumar <vipulk0511@...il.com>
Cc: Daniel Lezcano <daniel.lezcano@...aro.org>,
linux-kernel@...r.kernel.org, Stable <stable@...r.kernel.org>,
Srikanth Krishnakar <Srikanth_Krishnakar@...tor.com>,
Cedric Hombourger <Cedric_Hombourger@...tor.com>,
x86@...nel.org, Len Brown <len.brown@...el.com>,
Vipul Kumar <vipul_kumar@...tor.com>
Subject: Re: [v3] x86/tsc: Unset TSC_KNOWN_FREQ and TSC_RELIABLE flags on
Intel Bay Trail SoC
Hi,
On 1/24/20 9:35 AM, Thomas Gleixner wrote:
> Hans,
>
> Hans de Goede <hdegoede@...hat.com> writes:
>
>> Hi,
>>
>> Sorry for top posting, but this is a long and almost unreadable thread ...
>>
>> So it seems to me that a better fix would be to change the freq_desc_byt struct from:
>>
>> static const struct freq_desc freq_desc_byt = {
>> 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 }
>> };
>>
>> to:
>>
>> static const struct freq_desc freq_desc_byt = {
>> 1, { 83333, 100000, 133300, 116700, 80000, 0, 0, 0 }
>> };
>>
>> That should give us the right TSC frequency without needing to mess with
>> the TSC_KNOWN_FREQ and TSC_RELIABLE flags.
>
> Where does that number come from? Just math?
Yes just math, but perhaps the Intel folks can see if they can find some
datasheet to back this up ?
I mean if the calculated freq is off by that much, then chances are that
my solution actuallly is not only "just math" but also correct :)
Regards,
Hans
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