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Message-ID: <948c046a-5e95-104c-0bc0-f3615edddeca@codeaurora.org>
Date: Sat, 25 Jan 2020 21:09:27 +0530
From: Maulik Shah <mkshah@...eaurora.org>
To: Matthias Kaehlcke <mka@...omium.org>
Cc: agross@...nel.org, robh+dt@...nel.org, bjorn.andersson@...aro.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
rnayak@...eaurora.org, ilina@...eaurora.org, lsrao@...eaurora.org,
swboyd@...omium.org, evgreen@...omium.org, dianders@...omium.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sc7180: Add cpuidle low power states
Hi Matthias,
Yes, i will post new version very soon.
Thanks,
Maulik
On 1/22/2020 5:14 AM, Matthias Kaehlcke wrote:
> Hi Maulik,
>
> what is the state of this patch? Sudeep and Stephen had comments requesting
> minor changes, do you plan to send a v2 soon?
>
> Thanks
>
> Matthias
>
> On Wed, Oct 30, 2019 at 09:35:18AM +0530, Maulik Shah wrote:
>> Add device bindings for cpuidle states for cpu devices.
>>
>> Cc: devicetree@...r.kernel.org
>> Signed-off-by: Maulik Shah <mkshah@...eaurora.org>
>> ---
>> arch/arm64/boot/dts/qcom/sc7180.dtsi | 78 ++++++++++++++++++++++++++++++++++++
>> 1 file changed, 78 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
>> index fceac50..69d5e2c 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
>> @@ -70,6 +70,9 @@
>> compatible = "arm,armv8";
>> reg = <0x0 0x0>;
>> enable-method = "psci";
>> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
>> + &LITTLE_CPU_SLEEP_1
>> + &CLUSTER_SLEEP_0>;
>> next-level-cache = <&L2_0>;
>> L2_0: l2-cache {
>> compatible = "cache";
>> @@ -85,6 +88,9 @@
>> compatible = "arm,armv8";
>> reg = <0x0 0x100>;
>> enable-method = "psci";
>> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
>> + &LITTLE_CPU_SLEEP_1
>> + &CLUSTER_SLEEP_0>;
>> next-level-cache = <&L2_100>;
>> L2_100: l2-cache {
>> compatible = "cache";
>> @@ -97,6 +103,9 @@
>> compatible = "arm,armv8";
>> reg = <0x0 0x200>;
>> enable-method = "psci";
>> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
>> + &LITTLE_CPU_SLEEP_1
>> + &CLUSTER_SLEEP_0>;
>> next-level-cache = <&L2_200>;
>> L2_200: l2-cache {
>> compatible = "cache";
>> @@ -109,6 +118,9 @@
>> compatible = "arm,armv8";
>> reg = <0x0 0x300>;
>> enable-method = "psci";
>> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
>> + &LITTLE_CPU_SLEEP_1
>> + &CLUSTER_SLEEP_0>;
>> next-level-cache = <&L2_300>;
>> L2_300: l2-cache {
>> compatible = "cache";
>> @@ -121,6 +133,9 @@
>> compatible = "arm,armv8";
>> reg = <0x0 0x400>;
>> enable-method = "psci";
>> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
>> + &LITTLE_CPU_SLEEP_1
>> + &CLUSTER_SLEEP_0>;
>> next-level-cache = <&L2_400>;
>> L2_400: l2-cache {
>> compatible = "cache";
>> @@ -133,6 +148,9 @@
>> compatible = "arm,armv8";
>> reg = <0x0 0x500>;
>> enable-method = "psci";
>> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
>> + &LITTLE_CPU_SLEEP_1
>> + &CLUSTER_SLEEP_0>;
>> next-level-cache = <&L2_500>;
>> L2_500: l2-cache {
>> compatible = "cache";
>> @@ -145,6 +163,9 @@
>> compatible = "arm,armv8";
>> reg = <0x0 0x600>;
>> enable-method = "psci";
>> + cpu-idle-states = <&BIG_CPU_SLEEP_0
>> + &BIG_CPU_SLEEP_1
>> + &CLUSTER_SLEEP_0>;
>> next-level-cache = <&L2_600>;
>> L2_600: l2-cache {
>> compatible = "cache";
>> @@ -157,12 +178,69 @@
>> compatible = "arm,armv8";
>> reg = <0x0 0x700>;
>> enable-method = "psci";
>> + cpu-idle-states = <&BIG_CPU_SLEEP_0
>> + &BIG_CPU_SLEEP_1
>> + &CLUSTER_SLEEP_0>;
>> next-level-cache = <&L2_700>;
>> L2_700: l2-cache {
>> compatible = "cache";
>> next-level-cache = <&L3_0>;
>> };
>> };
>> +
>> + idle-states {
>> + entry-method = "psci";
>> +
>> + LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
>> + compatible = "arm,idle-state";
>> + idle-state-name = "little-power-down";
>> + arm,psci-suspend-param = <0x40000003>;
>> + entry-latency-us = <350>;
>> + exit-latency-us = <461>;
>> + min-residency-us = <1890>;
>> + local-timer-stop;
>> + };
>> +
>> + LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
>> + compatible = "arm,idle-state";
>> + idle-state-name = "little-rail-power-down";
>> + arm,psci-suspend-param = <0x40000004>;
>> + entry-latency-us = <360>;
>> + exit-latency-us = <531>;
>> + min-residency-us = <3934>;
>> + local-timer-stop;
>> + };
>> +
>> + BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
>> + compatible = "arm,idle-state";
>> + idle-state-name = "big-power-down";
>> + arm,psci-suspend-param = <0x40000003>;
>> + entry-latency-us = <264>;
>> + exit-latency-us = <621>;
>> + min-residency-us = <952>;
>> + local-timer-stop;
>> + };
>> +
>> + BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
>> + compatible = "arm,idle-state";
>> + idle-state-name = "big-rail-power-down";
>> + arm,psci-suspend-param = <0x40000004>;
>> + entry-latency-us = <702>;
>> + exit-latency-us = <1061>;
>> + min-residency-us = <4488>;
>> + local-timer-stop;
>> + };
>> +
>> + CLUSTER_SLEEP_0: cluster-sleep-0 {
>> + compatible = "arm,idle-state";
>> + idle-state-name = "cluster-power-down";
>> + arm,psci-suspend-param = <0x400000F4>;
>> + entry-latency-us = <3263>;
>> + exit-latency-us = <6562>;
>> + min-residency-us = <9987>;
>> + local-timer-stop;
>> + };
>> + };
>> };
>>
>> memory@...00000 {
>> --
>> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
>> of Code Aurora Forum, hosted by The Linux Foundation
>>
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
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