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Message-ID: <41DEDE07-DBA6-4397-A6F5-07D650436A6A@flygoat.com>
Date: Sat, 25 Jan 2020 11:31:00 +0800
From: Jiaxun Yang <jiaxun.yang@...goat.com>
To: Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Paul Burton <paulburton@...nel.org>
CC: linux-mips@...r.kernel.org, chenhc@...ote.com,
paul.burton@...s.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] MIPS: Introduce aligned IO memory operations
于 2020年1月24日 GMT+08:00 下午10:07:51, Thomas Bogendoerfer <tsbogend@...ha.franken.de> 写到:
>On Wed, Jan 22, 2020 at 10:45:06AM -0800, Paul Burton wrote:
>> Hi Jiaxun,
>>
>> On Tue, Jan 14, 2020 at 08:23:43PM +0800, Jiaxun Yang wrote:
>> > Some platforms, such as Loongson64 or QEMU/KVM, don't support
>unaligned
>> > instructions like lwl or lwr in IO memory access. However, our
>current
>> > IO memcpy/memset is wired to the generic implementation, which
>leads
>> > to a fatal result.
>>
>> Hmm, I wonder if we should just do this unconditionally on all
>systems.
>> I can't think of a reason it'd ever be a good idea to use lwl/lwr on
>an
>> MMIO device. Any thoughts on that?
>
>depends on the type of device. I can see benefits for framebuffers
>and memory devices since memset/memcpy are more optimised than the
>function in this patch.
lwl/lwr is slower than this implementation on your system?
I thought that other platforms support unaligned request can be benefited from speed up of these instructions.
>
>Thomas.
--
Jiaxun Yang
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