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Message-ID: <20200127175758.82410-1-roger.pau@citrix.com>
Date: Mon, 27 Jan 2020 18:57:58 +0100
From: Roger Pau Monne <roger.pau@...rix.com>
To: <linux-kernel@...r.kernel.org>
CC: Roger Pau Monne <roger.pau@...rix.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
"H. Peter Anvin" <hpa@...or.com>, <x86@...nel.org>,
"Peter Zijlstra" <peterz@...radead.org>,
Tony Luck <tony.luck@...el.com>,
Jacob Pan <jacob.jun.pan@...ux.intel.com>,
Kefeng Wang <wangkefeng.wang@...wei.com>,
Jan Beulich <jbeulich@...e.com>,
Sean Christopherson <sean.j.christopherson@...el.com>
Subject: [PATCH] x86/apic: simplify disconnect_bsp_APIC setup of LVT{0/1}
There's no need to read the current values of LVT{0/1} for the
purposes of the function, which seem to be to save the currently
selected vector: in the destination modes used (ExtINT and NMI) the
vector field is ignored and hence can be set to 0.
Note that clear_local_APIC as called by init_bsp_APIC would have
already wiped those registers by writing APIC_LVT_MASKED, and hence
there's nothing useful to preserve if that was the intent. Also note
that there are other places where LVT{0/1} is written to without doing
a read-modify-write (init_bsp_APIC and clear_local_APIC), so if
writing 0s to the reserved parts would cause issues they would be also
triggered by writes elsewhere.
Signed-off-by: Roger Pau Monné <roger.pau@...rix.com>
---
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Ingo Molnar <mingo@...hat.com>
Cc: Borislav Petkov <bp@...en8.de>
Cc: "H. Peter Anvin" <hpa@...or.com>
Cc: x86@...nel.org
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Tony Luck <tony.luck@...el.com>
Cc: Jacob Pan <jacob.jun.pan@...ux.intel.com>
Cc: Kefeng Wang <wangkefeng.wang@...wei.com>
Cc: Jan Beulich <jbeulich@...e.com>
Cc: Sean Christopherson <sean.j.christopherson@...el.com>
---
arch/x86/kernel/apic/apic.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 28446fa6bf18..ce0c65340b4c 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -2292,12 +2292,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
* For LVT0 make it edge triggered, active high,
* external and enabled
*/
- value = apic_read(APIC_LVT0);
- value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
- APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
- APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
- value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
- value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
+ value = APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING | APIC_DM_EXTINT;
apic_write(APIC_LVT0, value);
} else {
/* Disable LVT0 */
@@ -2308,12 +2303,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
* For LVT1 make it edge triggered, active high,
* nmi and enabled
*/
- value = apic_read(APIC_LVT1);
- value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
- APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
- APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
- value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
- value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_NMI);
+ value = APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING | APIC_DM_NMI;
apic_write(APIC_LVT1, value);
}
--
2.25.0
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