linux-kernel - Re: [v3] x86/tsc: Unset TSC_KNOWN_FREQ and TSC

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Message-ID: <CADdC98S6cgYbvs-qt1YSJcicOq-z-sbpK-zejyBJ=kWxkUrxaA@mail.gmail.com>
Date:   Tue, 28 Jan 2020 20:09:32 +0530
From:   vipul kumar <vipulk0511@...il.com>
To:     Hans de Goede <hdegoede@...hat.com>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        linux-kernel@...r.kernel.org, Stable <stable@...r.kernel.org>,
        Srikanth Krishnakar <Srikanth_Krishnakar@...tor.com>,
        Cedric Hombourger <Cedric_Hombourger@...tor.com>,
        x86@...nel.org, Len Brown <len.brown@...el.com>,
        Vipul Kumar <vipul_kumar@...tor.com>
Subject: Re: [v3] x86/tsc: Unset TSC_KNOWN_FREQ and TSC_RELIABLE flags on
 Intel Bay Trail SoC

Hi Hans,


On Tue, Jan 28, 2020 at 7:53 PM Hans de Goede <hdegoede@...hat.com> wrote:
>
> Hi,
>
> On 28-01-2020 12:47, vipul kumar wrote:
> > Hi Thomas,
> >
> > Please find attached logs with mainline kernel version 5.4.15 with patch.
>
> So the suggested change seems to not work, that is strange.

   Attached logs was with the patch that I had submitted as V3.

   I made changes in kernel as per your suggestion. Board is running
with your suggested changes. Will update you with the result.

  Regards,
  Vipul
>
> Can you double check you are running the correct kernel and
> add the following change and gather debug output ? :
>
> --- a/arch/x86/kernel/tsc_msr.c
> +++ b/arch/x86/kernel/tsc_msr.c
> @@ -102,6 +103,8 @@ unsigned long cpu_khz_from_msr(void)
>          /* Get FSB FREQ ID */
>
> + pr_err("tsc msr id match %ld lo 0x%02x\n", id - tsc_msr_cpu_ids, lo);
> +
>          /* Map CPU reference clock freq ID(0-7) to CPU reference clock freq(KHz) */
>          freq = freq_desc->freqs[lo & 0x7];
>
> Regards,
>
> Hans
>
>
>
> > On Fri, Jan 24, 2020 at 9:24 PM Hans de Goede <hdegoede@...hat.com <mailto:hdegoede@...hat.com>> wrote:
> >
> >     Hi,
> >
> >     On 1/24/20 12:55 PM, Thomas Gleixner wrote:
> >      > Hans,
> >      >
> >      > Hans de Goede <hdegoede@...hat.com <mailto:hdegoede@...hat.com>> writes:
> >      >> On 1/24/20 9:35 AM, Thomas Gleixner wrote:
> >      >>> Where does that number come from? Just math?
> >      >>
> >      >> Yes just math, but perhaps the Intel folks can see if they can find some
> >      >> datasheet to back this up ?
> >      >
> >      > Can you observe the issue on one of the machines in your zoo as well?
> >
> >     I haven't tried yet. Looking at the thread sofar the problem was noticed on
> >     a system with a Celeron N2930, I don't have access to one of those, I
> >     do have access to a system with a closely related N2840 I will give that
> >     a try as well as see if I can reproduce this on one of the tablet
> >     oriented Z3735x SoCs.
> >
> >     I'll report back when I have had a chance to test this.
> >
> >     Regards,
> >
> >     Hans
> >
>