lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 30 Jan 2020 16:17:58 +0000
From:   Chris Wilson <chris@...is-wilson.co.uk>
To:     Dave Airlie <airlied@...il.com>,
        Linus Torvalds <torvalds@...ux-foundation.org>
Cc:     Daniel Vetter <daniel.vetter@...ll.ch>,
        LKML <linux-kernel@...r.kernel.org>,
        dri-devel <dri-devel@...ts.freedesktop.org>
Subject: Re: [git pull] drm for 5.6-rc1

Quoting Linus Torvalds (2020-01-30 16:13:24)
> On Wed, Jan 29, 2020 at 9:58 PM Dave Airlie <airlied@...il.com> wrote:
> >
> > It has two known conflicts, one in i915_gem_gtt, where you should juat
> > take what's in the pull (it looks messier than it is),
> 
> That doesn't seem right. If I do that, I lose the added GEM_BUG_ON()'s.
> 
> I think the proper merge resolution does this:
> 
> diff --git a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
> b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
> index f10b2c41571c..f4fec7eb4064 100644
> --- a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
> +++ b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
> @@ -131,6 +131,7 @@ static void gen6_ppgtt_insert_entries(struct
> i915_address_space *vm,
> 
>         vaddr = kmap_atomic_px(i915_pt_entry(pd, act_pt));
>         do {
> +               GEM_BUG_ON(iter.sg->length < I915_GTT_PAGE_SIZE);
>                 vaddr[act_pte] = pte_encode | GEN6_PTE_ADDR_ENCODE(iter.dma);
> 
>                 iter.dma += I915_GTT_PAGE_SIZE;
> diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> index 077b8f7cf6cb..4d1de2d97d5c 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> @@ -379,6 +379,7 @@ gen8_ppgtt_insert_pte(struct i915_ppgtt *ppgtt,
>         pd = i915_pd_entry(pdp, gen8_pd_index(idx, 2));
>         vaddr = kmap_atomic_px(i915_pt_entry(pd, gen8_pd_index(idx, 1)));
>         do {
> +               GEM_BUG_ON(iter->sg->length < I915_GTT_PAGE_SIZE);
>                 vaddr[gen8_pd_index(idx, 0)] = pte_encode | iter->dma;
> 
>                 iter->dma += I915_GTT_PAGE_SIZE;

Yes, that matches the code in drm-intel-next-queued.
-Chris

Powered by blists - more mailing lists