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Message-Id: <20200131003208.95C3920674@mail.kernel.org>
Date:   Thu, 30 Jan 2020 16:32:07 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Li Yang <leoyang.li@....com>, Mark Rutland <mark.rutland@....com>,
        Michael Turquette <mturquette@...libre.com>,
        Michael Walle <michael@...le.cc>,
        Rob Herring <robh+dt@...nel.org>, Wen He <wen.he_1@....com>,
        devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     Wen He <wen.he_1@....com>
Subject: Re: [v12 2/2] clk: ls1028a: Add clock driver for Display output interface

Quoting Wen He (2019-12-13 00:34:02)
> Add clock driver for QorIQ LS1028A Display output interfaces(LCD, DPHY),
> as implemented in TSMC CLN28HPM PLL, this PLL supports the programmable
> integer division and range of the display output pixel clock's 27-594MHz.
> 
> Signed-off-by: Wen He <wen.he_1@....com>
> Signed-off-by: Michael Walle <michael@...le.cc>
> ---

Applied to clk-next

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