linux-kernel - [PATCH v3 07/12] ARM: dts: imx7d: cl-som-imx7: add/enable SPI flash on spi1

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 31 Jan 2020 08:36:33 +0000
From:   André Draszik <git@...red.net>
To:     linux-kernel@...r.kernel.org
Cc:     André Draszik <git@...red.net>,
        Ilya Ledvich <ilya@...pulab.co.il>,
        Igor Grinberg <grinberg@...pulab.co.il>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v3 07/12] ARM: dts: imx7d: cl-som-imx7: add/enable SPI flash on spi1

add/enable SPI flash on spi1 using the default vendor's
partition layout as per downstream kernel

Signed-off-by: André Draszik <git@...red.net>
Cc: Ilya Ledvich <ilya@...pulab.co.il>
Cc: Igor Grinberg <grinberg@...pulab.co.il>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Shawn Guo <shawnguo@...nel.org>
Cc: Sascha Hauer <s.hauer@...gutronix.de>
Cc: Pengutronix Kernel Team <kernel@...gutronix.de>
Cc: Fabio Estevam <festevam@...il.com>
Cc: NXP Linux Team <linux-imx@....com>
Cc: devicetree@...r.kernel.org
Cc: linux-arm-kernel@...ts.infradead.org
---
 arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 45 +++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index ca3c5d95d6c3..d4637a8ca223 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -28,6 +28,36 @@
 	cpu-supply = <&sw1a_reg>;
 };
 
+&ecspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
+	cs-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+
+		partition@0 {
+			label = "uboot";
+			reg = <0x0 0xc0000>;
+		};
+
+		partition@...00 {
+			label = "uboot environment";
+			reg = <0xc0000 0x40000>;
+		};
+
+		partition@...000 {
+			label = "splash";
+			reg = <0x100000 0x100000>;
+		};
+	};
+};
+
 &fec1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1phy>;
@@ -214,6 +244,21 @@
 };
 
 &iomuxc {
+	pinctrl_ecspi1: ecspi1grp {
+		fsl,pins = <
+			MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI		0xf
+			MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO		0xf
+			MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK		0xf
+		>;
+	};
+
+	pinctrl_ecspi1_cs: ecspi1_cs_grp {
+		fsl,pins = <
+			/* SPI flash chipselect */
+			MX7D_PAD_ECSPI1_SS0__GPIO4_IO19			0x34
+		>;
+	};
+
 	pinctrl_enet1: enet1grp {
 		fsl,pins = <
 			MX7D_PAD_SD2_CD_B__ENET1_MDIO			0x30
-- 
2.23.0.rc1