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Message-ID: <b263ce1549ef4a6e1a0659f2fa0165e1@codeaurora.org>
Date:   Mon, 03 Feb 2020 15:17:21 +0800
From:   Can Guo <cang@...eaurora.org>
To:     "Bean Huo (beanhuo)" <beanhuo@...ron.com>
Cc:     asutoshd@...eaurora.org, nguyenb@...eaurora.org,
        hongwus@...eaurora.org, rnayak@...eaurora.org,
        linux-scsi@...r.kernel.org, kernel-team@...roid.com,
        saravanak@...gle.com, salyzyn@...gle.com,
        Alim Akhtar <alim.akhtar@...sung.com>,
        Avri Altman <avri.altman@....com>,
        Pedro Sousa <pedrom.sousa@...opsys.com>,
        "James E.J. Bottomley" <jejb@...ux.ibm.com>,
        "Martin K. Petersen" <martin.petersen@...cle.com>,
        Tomas Winkler <tomas.winkler@...el.com>,
        Stanley Chu <stanley.chu@...iatek.com>,
        Venkat Gopalakrishnan <venkatg@...eaurora.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [EXT] [PATCH v4 6/8] scsi: ufs: Add dev ref clock gating wait
 time support

On 2020-01-24 07:11, Bean Huo (beanhuo) wrote:
> Hi,  Can
> 
>> 
>> In UFS version 3.0, a newly added attribute bRefClkGatingWaitTime 
>> defines the
>> minimum time for which the reference clock is required by device 
>> during
>> transition to LS-MODE or HIBERN8 state. Make this change to reflect 
>> the new
>> requirement by adding delays before turning off the clock.
>> 
>> Signed-off-by: Can Guo <cang@...eaurora.org>
>> ---
>>  drivers/scsi/ufs/ufs.h    |  3 +++
>>  drivers/scsi/ufs/ufshcd.c | 41
>> +++++++++++++++++++++++++++++++++++++++++
>>  2 files changed, 44 insertions(+)
>> 
>> diff --git a/drivers/scsi/ufs/ufs.h b/drivers/scsi/ufs/ufs.h index
>> 3327981..385bac8 100644
>> --- a/drivers/scsi/ufs/ufs.h
>> +++ b/drivers/scsi/ufs/ufs.h
>> @@ -168,6 +168,7 @@ enum attr_idn {
>>  	QUERY_ATTR_IDN_FFU_STATUS		= 0x14,
>>  	QUERY_ATTR_IDN_PSA_STATE		= 0x15,
>>  	QUERY_ATTR_IDN_PSA_DATA_SIZE		= 0x16,
>> +	QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME	= 0x17,
>>  };
>> 
>>  /* Descriptor idn for Query requests */ @@ -530,6 +531,8 @@ struct
>> ufs_dev_info {
>>  	bool f_power_on_wp_en;
>>  	/* Keeps information if any of the LU is power on write protected */
>>  	bool is_lu_power_on_wp;
>> +	u16 spec_version;
>> +	u32 clk_gating_wait_us;
>>  };
>> 
> This one also need rebase
> 
> Thanks,
> 
> //Bean

Shall rebase this series.

Thanks,

Can Guo

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