lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <99fd3904-37fa-f070-f7ac-e1dcb5bf43de@intel.com>
Date:   Mon, 3 Feb 2020 13:31:20 +0200
From:   Adrian Hunter <adrian.hunter@...el.com>
To:     Manish Narani <manish.narani@...inx.com>, michal.simek@...inx.com,
        ulf.hansson@...aro.org, jolly.shah@...inx.com,
        rajan.vaja@...inx.com, nava.manne@...inx.com,
        tejas.patel@...inx.com
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mmc@...r.kernel.org
Subject: Re: [PATCH 4/4] sdhci: arasan: Remove quirk for broken base clock

On 21/01/20 12:21 pm, Manish Narani wrote:
> This patch removes quirk which indicates a broken base clock. This was
> making the kernel report wrong base clock of ~187MHz instead of 200MHz
> even as the measurement on the hardware was showing 200MHz.
> 
> Signed-off-by: Manish Narani <manish.narani@...inx.com>
> State: pending

Huh?

Otherwise:

Acked-by: Adrian Hunter <adrian.hunter@...el.com>

> ---
>  drivers/mmc/host/sdhci-of-arasan.c | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
> index 39176ab5ca1f..0146d7dd315b 100644
> --- a/drivers/mmc/host/sdhci-of-arasan.c
> +++ b/drivers/mmc/host/sdhci-of-arasan.c
> @@ -358,6 +358,17 @@ static struct sdhci_arasan_of_data sdhci_arasan_data = {
>  	.pdata = &sdhci_arasan_pdata,
>  };
>  
> +static const struct sdhci_pltfm_data sdhci_arasan_zynqmp_pdata = {
> +	.ops = &sdhci_arasan_ops,
> +	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> +			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
> +			SDHCI_QUIRK2_STOP_WITH_TC,
> +};
> +
> +static struct sdhci_arasan_of_data sdhci_arasan_zynqmp_data = {
> +	.pdata = &sdhci_arasan_zynqmp_pdata,
> +};
> +
>  static u32 sdhci_arasan_cqhci_irq(struct sdhci_host *host, u32 intmask)
>  {
>  	int cmd_error = 0;
> @@ -553,7 +564,7 @@ static const struct of_device_id sdhci_arasan_of_match[] = {
>  	},
>  	{
>  		.compatible = "xlnx,zynqmp-8.9a",
> -		.data = &sdhci_arasan_data,
> +		.data = &sdhci_arasan_zynqmp_data,
>  	},
>  	{ /* sentinel */ }
>  };
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ