[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAOMZO5CRwOpNUtUqTmdvV0Yz=fRadjYwpv19KZyhdc-ea0+_ZA@mail.gmail.com>
Date: Mon, 3 Feb 2020 11:22:33 -0300
From: Fabio Estevam <festevam@...il.com>
To: Stefan Agner <stefan@...er.ch>
Cc: Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Russell King - ARM Linux <linux@...linux.org.uk>,
Sascha Hauer <kernel@...gutronix.de>,
NXP Linux Team <linux-imx@....com>,
Arnd Bergmann <arnd@...db.de>,
Yongcai Huang <Anson.Huang@....com>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Stefan Agner <stefan.agner@...adex.com>
Subject: Re: [PATCH] ARM: imx: limit errata selection to Cortex-A9 based designs
Hi Stefan,
On Sun, Feb 2, 2020 at 4:30 PM Stefan Agner <stefan@...er.ch> wrote:
>
> From: Stefan Agner <stefan.agner@...adex.com>
>
> The two erratas 754322 and 775420 are Cortex-A9 specific. Only
> select the erratas for SoC which use a Cortex-A9.
Change looks good.
It is not clear from the commit log, which SoC selects the errata
incorrectly though.
I would mention that i.MX6UL is based on Cortex-A7 and hence should
not select them.
Otherwise, only by looking at this patch context and commit log, we
cannot notice the problem.
Reviewed-by: Fabio Estevam <festevam@...il.com>
Powered by blists - more mailing lists