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Message-ID: <CAHTX3dKUf0RPDt7WerPOe-4fGhqJZ4cAOTjWtrNG8oZu4iU-_Q@mail.gmail.com>
Date: Tue, 4 Feb 2020 11:32:20 +0100
From: Michal Simek <monstr@...str.eu>
To: LKML <linux-kernel@...r.kernel.org>,
Michal Simek <monstr@...str.eu>, git <git@...inx.com>
Cc: Siva Durga Prasad Paladugu <siva.durga.paladugu@...inx.com>
Subject: Re: [PATCH] microblaze: Align comments with register usage
st 8. 1. 2020 v 15:09 odesÃlatel Michal Simek <michal.simek@...inx.com> napsal:
>
> Trivial patch.
>
> Signed-off-by: Michal Simek <michal.simek@...inx.com>
> ---
>
> arch/microblaze/kernel/head.S | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
> index 7d2894418691..14b276406153 100644
> --- a/arch/microblaze/kernel/head.S
> +++ b/arch/microblaze/kernel/head.S
> @@ -121,10 +121,10 @@ no_fdt_arg:
> tophys(r4,r4) /* convert to phys address */
> ori r3, r0, COMMAND_LINE_SIZE - 1 /* number of loops */
> _copy_command_line:
> - /* r2=r5+r6 - r5 contain pointer to command line */
> + /* r2=r5+r11 - r5 contain pointer to command line */
> lbu r2, r5, r11
> beqid r2, skip /* Skip if no data */
> - sb r2, r4, r11 /* addr[r4+r6]= r2 */
> + sb r2, r4, r11 /* addr[r4+r11]= r2 */
> addik r11, r11, 1 /* increment counting */
> bgtid r3, _copy_command_line /* loop for all entries */
> addik r3, r3, -1 /* decrement loop */
> @@ -139,8 +139,8 @@ skip:
> ori r4, r0, TOPHYS(_bram_load_start) /* save bram context */
> ori r3, r0, (LMB_SIZE - 4)
> _copy_bram:
> - lw r7, r0, r11 /* r7 = r0 + r6 */
> - sw r7, r4, r11 /* addr[r4 + r6] = r7 */
> + lw r7, r0, r11 /* r7 = r0 + r11 */
> + sw r7, r4, r11 /* addr[r4 + r11] = r7 */
> addik r11, r11, 4 /* increment counting */
> bgtid r3, _copy_bram /* loop for all entries */
> addik r3, r3, -4 /* descrement loop */
> --
> 2.24.0
>
Applied.
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
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