linux-kernel - Re: [PATCH v2 1/3] xhci: Ensure link state is U3 after setting USB_SS_PORT_LS

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Message-Id: <08A214EC-F78D-41E1-B080-2A03782E41C1@canonical.com>
Date:   Wed, 5 Feb 2020 19:24:59 +0800
From:   Kai-Heng Feng <kai.heng.feng@...onical.com>
To:     mathias.nyman@...el.com, gregkh@...uxfoundation.org,
        stern@...land.harvard.edu
Cc:     acelan.kao@...onical.com, linux-usb@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] xhci: Ensure link state is U3 after setting
 USB_SS_PORT_LS_U3



> On Feb 5, 2020, at 19:22, Kai-Heng Feng <kai.heng.feng@...onical.com> wrote:
> 
> The xHCI spec doesn't specify the upper bound of U3 transition time. For
> some devices 20ms is not enough, so we need to make sure the link state
> is in U3 before further actions.
> 
> I've tried to use U3 Entry Capability by setting U3 Entry Enable in
> config register, however the port change event for U3 transition
> interrupts the system suspend process.
> 
> For now let's use the less ideal method by polling PLS.
> 
> Signed-off-by: Kai-Heng Feng <kai.heng.feng@...onical.com>

Please ignore this series. Some patches are missing changelog, will resend one.

Kai-Heng

> ---
> v2:
> - Remove some redundant debug messages.
> - Use msleep loop outside if spinlock to stop pegging CPU.
> 
> drivers/usb/host/xhci-hub.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
> index 7a3a29e5e9d2..d3c5bcf76755 100644
> --- a/drivers/usb/host/xhci-hub.c
> +++ b/drivers/usb/host/xhci-hub.c
> @@ -1313,7 +1313,16 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
> 			xhci_set_link_state(xhci, ports[wIndex], link_state);
> 
> 			spin_unlock_irqrestore(&xhci->lock, flags);
> -			msleep(20); /* wait device to enter */
> +			if (link_state == USB_SS_PORT_LS_U3) {
> +				int retries = 10;
> +
> +				while (retries--) {
> +					msleep(10); /* wait device to enter */
> +					temp = readl(ports[wIndex]->addr);
> +					if ((temp & PORT_PLS_MASK) == XDEV_U3)
> +						break;
> +				}
> +			}
> 			spin_lock_irqsave(&xhci->lock, flags);
> 
> 			temp = readl(ports[wIndex]->addr);
> -- 
> 2.17.1
>